Released
PMC-Sierra, Inc.
PM9311/2/3/5 ETT1™ CHIP SET
Data Sheet
PMC-2000164
ISSUE 3
ENHANCED TT1™ SWITCH FABRIC
The Output Queue Manager maintains head and length information for unicast queues in the Output
Unicast Queue Information Memory, which is documented in Section 3.4 “Enhanced Port Processor
Registers”. This information is maintained within the EPP and no customer interaction is required.
However, in order to implement the Flow Control recovery procedure outlined in “Enhanced Port
Processor - Flow Control Crossbar” on page 94, the customer will need to read the length of each affected
unicast queue.
The Output Queue Manager is the source of the interrupts “Output UC or MC Queue Overflow” and “output
TDM Queue Overflow”.
3.1.6 Output Scheduler
The purpose of the Output Scheduler is to arbitrate among cells in the output queues waiting to be sent to
the output linecard(s). When the EPP is in OC-48c mode, the Output Scheduler arbitrates among cells
destined for each subport in turn (subport0, subport1, subport2, subport3, subport0,...).
Unicast traffic can be shut off on a per-source-port basis in the Output Scheduler, by the “Freeze Unicast
Output Scheduler Flows” register (see Section 3.4 “Enhanced Port Processor Registers”).
Hole requests from the linecard are sent to the Output Scheduler. When a hole request for a given priority
is valid, the Output Scheduler will not send any unicast or multicast cell of that priority during that celltime.
In OC-48c mode, separate hole requests come from each subport, and are delayed until that subport is
due to receive a cell.
When in LCS Stop mode, the Output Scheduler does not send cells to the linecard. Since the LCS
Start/Stop status is per linecard, subports on the same OC-48c mode port could have different Start/Stop
status. Even though cells are not sent to the linecard, TDM cells continue to be dequeued from the TDM
output queues. This is to prevent one stopped subport from blocking traffic to other subports, since the
output TDM/MC queues are shared among subports. If LCS Lossy mode is in effect, then multicast cells
will also continue to be dequeued.
The Output Scheduler also sends Control Packets to the linecard(s) under control of the “Send OOB2LC
Control Packet” register. When the Scheduler sends a TDM Sync command, the Output Scheduler sends
a TDM Sync Control Packet to the linecard(s). Several types of egress Control Packet must be written into
the correct locations in the Dataslice Output Queue Memory by software before the switch begins to
operate; see Section 3.3 “Output Dataslice Queue Memory Allocation with EPP” for details.
3.1.7 OOB Interface and Control/Status Registers
All of the devices have an OOB interface. This interface allows a single local CPU to control and monitor all
of the devices within a core fabric. Internally, each device provides registers that can be mapped into the
CPU’s address space. These registers are described in more detail in Section 3.4 “Enhanced Port
Processor Registers”.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
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