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PO49FCT32806G 参数 Datasheet PDF下载

PO49FCT32806G图片预览
型号: PO49FCT32806G
PDF下载: 下载PDF文件 查看货源
内容描述: 3.3V双路1 : 5的CMOS反相时钟缓冲驱动器 [3.3V Dual 1:5 CMOS Invert Clock Buffered Driver]
分类和应用: 驱动器时钟
文件页数/大小: 6 页 / 554 K
品牌: POTATO [ POTATO SEMICONDUCTOR CORPORATION ]
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PO49FCT32806
3.3V Dual 1:5 CMOS Invert Clock Buffered Driver
700MHz TTL/CMOS Potato Chip
11/22/05
Power Supply Characteristics
Symbol
Description
Quiescent Power Supply Current
Test Conditions (1)
Vcc=Max, Vin=Vcc or GND
Min
Typ
Max
Unit
Icc
Q
Notes:
1.
2.
3.
4.
-
0.1
30
uA
For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
Typical values are at Vcc = 3.3V, 25°C ambient.
This parameter is guaranteed but not tested.
Not more than one output should be shorted at one time. Duration of the test should not exceed one second.
Capacitance
Parameters (1)
Description
Input Capacitance
Output Capacitance
Test Conditions
Vin = 0V
Vout = 0V
Typ
Max
Unit
Cin
Cout
Notes:
3
-
4
6
pF
pF
1 This parameter is determined by device characterization but not production tested.
Switching Characteristics
Symbol
Description
Propagation Delay INA to OAn, INB to OBn
Output Enable Time
Output Disable Time
Rise/Fall Time
Pulse Skew (Same Package)
Output Pin to Pin Skew (Same Package)
Output Skew (Different Package)
Input Frequency
Input Frequency
Input Frequency
Input Frequency
Test Conditions (1)
CL = 15pF
CL = 15pF
CL = 15pF
0.8V – 2.0V
CL = 15pF, 125MHz
CL = 15pF, 125MHz
CL = 15pF, 125MHz
CL = 50pF
CL =15pF
CL = 5pF
CL = 2pF
Max
Unit
t
PLH &
t
PHL
t
PZH or
t
PZL
t
PHZ or
t
PLZ
tr/tf
tsk(p)
tsk(o)
tsk(pp)
fmax
fmax
fmax
fmax
Notes:
2.9
2.5
2.5
1
0.2
0.25
0.4
120
300
500
700
ns
ns
ns
ns
ns
ns
ns
MHz
MHz
MHz
MHz
1. See test circuits and waveforms.
2. tpLH, tpHL, tsk(p), and tsk(o) are production tested. All other parameters guaranteed but not production tested.
3. Airflow of 1m/s is recommended for frequencies above 133MHz
3
Copyright
© 2005, Potato Semiconductor Corporation