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PO49FCT32805 参数 Datasheet PDF下载

PO49FCT32805图片预览
型号: PO49FCT32805
PDF下载: 下载PDF文件 查看货源
内容描述: 3.3V双路1 : 5的CMOS时钟缓冲驱动器 [3.3V Dual 1:5 CMOS Clock Buffered Driver]
分类和应用: 驱动器时钟
文件页数/大小: 6 页 / 553 K
品牌: POTATO [ POTATO SEMICONDUCTOR CORPORATION ]
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PO49FCT32805
3.3V Dual 1:5 CMOS Clock Buffered Driver
600MHz TTL/CMOS Potato Chip
11/22/05
FEATURES:
. Operating frequency up to 600MHz with 2pf load
. Operating frequency up to 500MHz with 5pf load
. Operating frequency up to 270MHz with 15pf load
. Operating frequency up to 120MHz with 50pf load
. Very low output pin to pin skew < 250ps
. Very low pulse skew < 200ps
. VCC = 1.65V to 3.6V
. Propagation delay < 2.6ns max with 15pf load
. Low input capacitance: 3pf typical
. Dual 1:5 fanout
. Available in 20pin 300mil wide SOIC package
. Available in 20pin 150mil wide QSOP package
DESCRIPTION:
Potato Semiconductor’s PO49FCT32805G is
designed for world top performance using
submicron CMOS technology to achieve
600MHz TTL output frequency with less than
200ps output pulse skew.
PO49FCT32805G is a 3.3V CMOS Dual 1 input
to 5 outputs Buffered driver to achieve 600MHz
output frequency with integrated series damping
resistors on all outputs to match 50 ohm
transmission line impedance. Typical applications
are clock and signal distribution.
Pin Configuration
Logic Block Diagram
Pin Description
Pin Name
INA, INB
Description
Signal or clock Inputs
Hi-Z State Output Enable Inputs (Active LOW)
OAn, OBn
MON
Vcc, GND
Signal or clock Outputs
Monitor Output
Power, Ground
L
L
H
H
Inputs
INA, INB
L
H
L
H
Outputs
OAn, OBn
L
H
Z
Z
MON
L
H
L
H
1
Copyright
© 2005, Potato Semiconductor Corporation