PO74G139A
DUAL2-LINETO4-LINEDECODER/DEMULTIPLEXER
74 Series GHz Logic
02/07/07
FEATURES:
. Patented technology
. Operating frequency up to 1.125GHz with 2pf load
. Operating frequency up to 800MHz with 5pf load
. Operating frequency up to 350MHz with 15pf load
. VCC Operates from 1.65V to 3.6V
. Propagation delay < 1.7ns max with 15pf load
. Low input capacitance: 4pf typical
. Available in 16 pin SOIC package
DESCRIPTION:
Potato Semiconductor’s PO74G139A is designed for
world top performance using submicron CMOS
technology to achieve 1.125GHz TTL /CMOS output
frequency with less than 1.7ns propagation delay.
This quadruple bus buffer gate is designed for 1.65-V
to 3.6-V V
CC
operation.
The
PO74G139A
comprises two individual 2-line to
4-line decoders in a single package. Theactive-
lowenable (G) input can be used as a data line in
demultiplexing applications. This decoder/ demulti-
plexer features fully buffered
inputs, each of which represents only one normalized-
load to itsdriving circuit.
Inputs can be driven from either 3.3V or 5V devices.
This feature allows the use of these devices as
translators in a mixed 3.3V/5V system environment.
Pin Configuration
1G
1A
1B
1Y0
1Y1
1Y2
1Y3
GND
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
Logic Block Diagram
4
1Y0
1G
1
5
1Y1
V
CC
2G
2A
2B
2Y0
2Y1
2Y2
2Y3
6
1A
Select
Inputs
1B
2
7
1Y2
3
1Y3
Data
Outputs
12
2G
15
11
2Y0
2Y1
10
2A
Select
Inputs
2B
14
13
9
2Y2
2Y3
Pin Description
INPUTS
G
L
L
L
L
H
SELECT
B
L
L
H
H
X
A
L
H
L
H
X
Y3
H
H
H
L
H
OUTPUTS
Y2
H
H
L
H
H
Y1
H
L
H
H
H
Y0
L
H
H
H
H
1
Copyright
© Potato Semiconductor Corporation
POTATO [ POTATO SEMICONDUCTOR CORPORATION ]
