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PO74G2305ASU 参数 Datasheet PDF下载

PO74G2305ASU图片预览
型号: PO74G2305ASU
PDF下载: 下载PDF文件 查看货源
内容描述: 3.3V 1 : 5的CMOS时钟缓冲驱动器 [3.3V 1:5 CMOS Clock Buffered Driver]
分类和应用: 驱动器时钟
文件页数/大小: 5 页 / 390 K
品牌: POTATO [ POTATO SEMICONDUCTOR CORPORATION ]
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PO74G2305A
3.3V 1:5 CMOS Clock Buffered Driver
750MHz TTL/CMOS Potato Chip
10/05/07
FEATURES:
. Patented technology
. Max input frequency > 1GHz
. Operating frequency up to 750MHz with 2pf load
. Operating frequency up to 600MHz with 5pf load
. Operating frequency up to 300MHz with 15pf load
. Operating frequency up to 125MHz with 50pf load
. Very low output pin to pin skew < 80ps
. Very low pulse skew < 130ps
. VCC = 1.65V to 3.6V
. Propagation delay < 1.5ns max with 15pf load
. Low input capacitance: 3pf typical
. 1:5 fanout
. Available in 8pin 150mil wide SOIC package
DESCRIPTION:
Potato Semiconductor’s PO74G2305A is
designed for world top performance using
submicron CMOS technology to achieve
750MHz TTL output frequency with less than
80ps output pin to pin skew.
PO74G2305A is a 3.3V CMOS 1 input to 5
outputs Buffered driver to achieve 750MHz
output frequency. Typical applications are
clock and signal distribution.
Inputs can be driven from either 3.3V or 5V devices.
This feature allows the use of these devices as
translators in a mixed 3.3V/5V system environment.
Pin Configuration
Logic Block Diagram
INA
O2
O1
GND
1
2
3
4
8-Pin
SOIC
O5
7
O4
6
VDD
5
8
O3
Pin Description
Pin Name
INA
O1 to O5
Description
Input
Outputs
1
Copyright
© 2005-2006, Potato Semiconductor Corporation