PO74G16240A
16-Bit Inverting Buffer/ Driver with 3-State Outputs
74 Series GHz Logic
03/14/08
FEATURES:
. Patented technology
. Operating frequency up to 1.125GHz with 2pf load
. Operating frequency up to 700MHz with 5pf load
. Operating frequency up to 300MHz with 15pf load
. Operating frequency up to 100MHz with 50pf load
. VCC Operates from 1.65V to 3.6V
. Propagation delay < 1.5ns max with 15pf load
. Low input capacitance: 4pf typical
. Available in 48pin TSSOP package
DESCRIPTION:
Potato Semiconductor’s PO74G16240A is designed for
world top performance using submicron CMOS
technology to achieve 1.125GHz TTL /CMOS output
frequency with less than 1.5ns propagation delay.
This Octal bus buffer gate is designed for 1.65-V to
3.6-V V
CC
operation.
The
PO74G16240A
features independent line driver
swith 3-state outputs. Each output is disabled when the
associated output- enable(OE) input is high.
Inputs can be driven from either 3.3V or 5V devices.
This feature allows the use of these devices as
translators in a mixed 3.3V/5V system environment.
Pin Configuration
1
OE
1
Y
1
1
Y
2
Logic Block Diagram
1
OE
1
3
OE
25
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
2
OE
1
A
1
1
A
2
1
A
1
47
2
1
Y
1
3
A
1
36
13
3
Y
1
1
A
2
46
3
1
Y
2
3
A
2
35
14
3
Y
2
GND
1
Y
3
1
Y
4
GND
1
A
3
1
A
4
1
A
3
44
5
1
Y
3
3
A
3
33
16
3
Y
3
V
CC
2
Y
1
2
Y
2
V
CC
2
A
1
2
A
2
1
A
4
43
6
1
Y
4
3
A
4
32
17
3
Y
4
2
OE
48
4
OE
24
GND
2
Y
3
2
Y
4
3
Y
1
3
Y
2
GND
2
A
3
2
A
4
3
A
1
3
A
2
2
A
3
2
A
1
41
8
2
Y
1
4
A
1
30
19
4
Y
1
2
A
2
40
9
2
Y
2
4
A
2
29
20
4
Y
2
38
11
2
Y
3
4
A
3
27
22
4
Y
3
GND
3
Y
3
3
Y
4
GND
3
A
3
3
A
4
2
A
4
37
12
2
Y
4
4
A
4
26
23
4
Y
4
V
CC
4
Y
1
4
Y
2
V
CC
4
A
1
4
A
2
Pin Description
Inputs
nOE
L
L
H
nA
X
L
H
X
Outputs
nYx
H
L
Z
GND
4
Y
3
4
Y
4
4
OE
GND
4
A
3
4
A
4
3
OE
1
Copyright
© Potato Semiconductor Corporation
POTATO [ POTATO SEMICONDUCTOR CORPORATION ]
