PO74HSTL85353A
www.potatosemi.com
LVCMOS and XTAL Input to HSTLOutput 1:4 Fanout Buffer
300MHz HSTL Potato Chip
FEATURES:
. Patented Technology
. Four HSTL differential outputs
. Two single LVTTL/LVCMOS inputs
(selectable LVCMOS/ LVTTL clock or crystal input)
. Operating frequency up to 300MHz with 15pf load
. Very low output pin to pin skew < 50ps
. 3.4-ns propagation delay (max)
. 2.4V to 3.6V power supply
. Industrial temperature range: –40°C to 85°C
. 20-pin TSSOP package
DESCRIPTION:
The PO74HSTL85353A is a low-skew, 1-to-4 differential
fanout buffer targeted to meet the requirements of
high-performance clock and data distribution applications.
The device is implemented on CMOS technology and has
a fully differential internal architecture that is optimized to
achieve low signal skews at operating frequencies of up to
300MHz .
The device features two inputs, one is LVTTL / LVCMO
signal and the other is crystal input. This mux is
controlled by the CLK_SEL pin. The PO74HSTL85353A
functions as a signal-level translator and fanout on
LVCMOS / LVTTL single-ended signal to four HSTL
differential loads. Since the PO74HSTL85353A
introduces negligible jitter to the timing budget, it is the
ideal choice for distributing high frequency, high precision
clocks across back-planes and boards in communication
systems.
Pin Configuration
V
EE
CLK_EN
CLK_SEL
CLK
nc
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
Logic Block Diagram
Q0
nQ0
V
CC
Q1
nQ1
Q2
nQ2
V
CC
Q3
nQ3
CLK_EN
Pullup
D
LE
Q
CLK
Pulldown
XTAL_IN
XTAL_OUT
CLK_SEL
Pulldown
0
Q0
nQ0
Q1
nQ1
Q2
nQ2
Q3
nQ3
XTAL_IN
XTAL_OUT
nc
nc
V
CC
OSC
1
Potato Semiconductor Corporation
1
01/01/10
POTATO [ POTATO SEMICONDUCTOR CORPORATION ]
