LCS700-708
OV/UV pin resistor divider chosen
for minimum required LLC gain
OV/UV pin resistor divider chosen
for minimum hold-up capacitance
495 V
VOVH
475 V
VOVL
436 V
VOVH
VSDH
418 V
VOVL
385 V
200 V
385 V
200 V
376 V
VSDH
331 V
298 V
VSDL
262 V
VSDL
Time
Time
PI-6154-051811
Figure 14. OV/UV Pin Voltage Thresholds, at Minimum and Maximum Divider Ratios, for 385 V Nominal Input Voltage.
If the input voltage is variable (e.g. no PFC pre-regulator), and
the variation is greater than 24%, the OV threshold should be
increased with external circuitry on the resistor divider. External
circuitry is also needed if VBROWNOUT needs to be reduced below
VREF
the default ratio.
RFMAX
In the example in the left-hand side of Figure 14 the resistor
divider is set so that brown-in threshold is 376 V, just under the VPFC
set-point of 385 V. The OV shutdown threshold is 495 V, which
gives adequate margin against the device max VDS rating of 530 V.
This minimizes required minimum LLC gain, and minimizes the
peak current at brown-out. In the example on the right of Figure
14, the OV restart threshold is set to 418 V, just above VPFC. This
maximizes hold-up time for a given bulk capacitor value.
DT/BF
GND
RBURST
PI-6460-05181
The OV/UV pin has an integrated 5 MW pull-down to detect
pin-open fault conditions.
Figure 15. DT/BF Pin Divider.
After the Burst Threshold detection, the DT/BF pin operates in
normal mode, sinking current, resembling a diode to ground,
with a Thevenin equivalent circuit of nominally 0.66 V and
1.1 kW. The current from the resistor divider into the pin,
The recommended pull-down resistor value for the OV/UV pin
divider is 20 kW - 22 kW. A very large resistor value will cause
the pin pull-down current to affect accuracy, and a small value
will increase power loss.
determines the dead-time and the maximum frequency fMAX
The relationship between dead-time and fMAX is fixed and
approximated by:
.
DT/BF Pin
The DT/BF pin senses the voltage divider ratio by entering into a
high-impedance mode for 500 ms after VCC is applied. It
senses the pin voltage, before the HiperLCS starts switching.
See Figure 15.
270000
Dead-Time ns
^
h
fMAX kHz =
The relationship between DT/BF pin current and fMAX, and
switching frequency vs. FEEDBACK pin current (which has the
same characteristic), is show in Figure 16.
There are 3 discrete Burst Threshold settings that can be
selected. (This determines the burst start and stop switching
frequencies, see Table 3).
The burst mode start and stop frequency thresholds are fixed
fractions of fMAX, which depend on the Burst Threshold setting,
as set by the resistor divider ratio on the DT/BF pin.
For proper selection, set the ratio of RBURST to RFMAX as per Table 3.
Burst Threshold
RBURST / RFMAX
Burst Threshold
fSTART/fMAX
fSTOP/fMAX
Setting
1
2
3
19
9
1
2
3
7/16
6/16
5/16
8/16
7/16
6/16
5.67
Table 3.
Burst Threshold Selection Table.
Table 4. Burst Start and Stop Frequencies as Ratios of fMAX
.
The Burst Threshold setting is stored until VCC is powered down.
13
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Rev. B 062011
POWERINT [ Power Integrations ]
