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USB0403C 参数 Datasheet PDF下载

USB0403C图片预览
型号: USB0403C
PDF下载: 下载PDF文件 查看货源
内容描述: 低电容TVS阵列 [LOW CAPACITANCE TVS ARRAY]
分类和应用: 瞬态抑制器二极管电视光电二极管局域网
文件页数/大小: 5 页 / 96 K
品牌: PROTEC [ PROTEK DEVICES ]
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USB0403  
thru  
USB0424C  
APPLICATIONS  
The USB04 Series are TVS arrays designed to protect I/O or  
data lines from the damaging effects of ESD and EFT. This  
product series provides both unidirectional and bidirectional  
protection, with a surge capability of 500 Watts PPP per line for  
an 8/20µs waveform and ESD protection > 40kV.  
Figure 1 - Unidirectional Configuration (Two TVS Devices)  
Common-Mode USB Protection  
1
2
4
1
4
3
GND  
SOLDER PAD  
UNIDIRECTIONAL  
COMMON-MODE CONFIGURATION (Figure 1)  
3
2
The two USB04 Series devices provide protection in a common-  
mode configuration as depicted in Figure 1.  
Circuit connectivity is as follows:  
USB IC  
TVS Device 1: Line 1(D+) is connected to Pins 2 & 3.  
TVS Device 2: Line 2(D-) is connected to Pins 2 & 3.  
D+  
D-  
Both TVS Devices: Pins 1 & 4 connected to ground.  
BIDIRECTIONAL  
DIFFERENTIAL-MODE CONFIGURATION (Figure 2)  
Figure 2 - Bidirectional Configuration  
Differential-Mode Ethernet Protection  
The USB04xxC Series provides protection in a differential-mode  
configuration as depicted in Figure 2.  
RX  
Circuit connectivity is as follows:  
Line 1(RX) is connected to Pins 1 & 4.  
Line 2(TX) is connected to Pins 2 & 3.  
1
2
4
3
R
R
T
X
CIRCUIT BOARD LAYOUT RECOMMENDATIONS  
Circuit board layout is critical for Electromagnetic Compatibility  
(EMC) protection. The following guidelines are recommended:  
The protection device should be placed near the input  
terminals or connectors, the device will divert the transient  
current immediately before it can be coupled into the nearby  
traces.  
The path length between the TVS device and the protected  
line should be minimized.  
All conductive loops including power and ground loops  
should be minimized.  
The transient current return path to ground should be kept  
as short as possible to reduce parasitic inductance.  
Ground planes should be used whenever possible. For  
multilayer PCBs, use ground vias.  
05205.R1 6/06  
4
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