PE42420
Product Specification
Evaluation Kit
The SPDT switch evaluation board was designed
to ease customer evaluation of Peregrine’s
PE42420. The RF common port is connected
through a 50Ω transmission line via the top SMA
connector, J2. RF1 and RF2 ports are connected
through 50Ω transmission lines via SMA
connectors J1 and J3, respectively. A 50Ω
through transmission line is available via SMA
connectors J4 and J5, which can be used to
calculate the loss of the PCB. J6 provides DC
and digital inputs to the device.
The board is constructed of a four metal layer
material with a total thickness of 36 mils. To
achieve high isolation, the 50Ω transmission lines
are designed in layer 2 using a stripline
waveguide design. The board stack up for 50Ω
transmission lines has 10 mil thickness of Rogers
4350 between layer 1 and layer 2, and 10 mil
thickness of Rogers 4350 between layer 2 and
layer 3.
For the true performance of the PE42420 to be
realized, the PCB should be designed in such a
way that RF transmission lines and sensitive DC
I/O traces are heavily isolated from one another.
Figure 19. Evaluation Board Layouts
101-0551
©2010-2013 Peregrine Semiconductor Corp. All rights reserved.
Page 8 of 11
Document No. DOC-14514-2
│
UltraCMOS
®
RFIC Solutions
PSEMI [ Peregrine Semiconductor ]
