Advance Information
FS8308
Phase/Frequency Detector (PFD)
The PFD compares an internal input frequency divider output signal,
f
V
, with an internal
reference frequency divider output signal,
f
R
, and generates an error signal, DO, which is
proportional to the phase error between
f
V
and
f
R
. The DO output is intended for use with
a passive filter as shown in Fig. 2.
Lock Detector (LD)
When phase comparator detects phase difference, LD terminal outputs “L”. When phase
comparator locks, LD terminal outputs “H”. On standby, outputs “H”. The criteria for lock
condition is that the phase difference between
f
V
and
f
R
is less than
2/xin
and continues for
more than three consecutive times.
The input/output waveforms for the PFD and LD are shown in Fig. 3.
Fig. 2 – Passive low-pass filter circuit
DO
R1
to VCO
C2
C1
Fig. 3 – PFD input/output waveforms
2/xin
f
R
f
V
high-Z
DO
high-Z
high-Z
LD
< 2/xin
< 2/xin
< 2/xin
Page 9
April 2003
PTC [ PRINCETON TECHNOLOGY CORP ]
