PT2259
FUNCTIONAL DESCRIPTION
I2C BUS INTERFACE
In PT2259 the DATA and CLK make up the bus interface through which data is transmitted to and from the
microprocessor.
DATA VALIDITY
Data on the DATA line is considered valid and stable only when the CLK signal is in the “high” state. In addition, the
“high” and “low” states of the DATA line can change only when the CLK signal is in the “low” state. Please refer to the
diagram below:
START AND STOP CONDITIONS
A start condition is activated when:
1. the CLK signal is set to “high”, and
2. the DATA signal shifts from “high” to “low”
A stop condition is activated when:
1. the CLK signal is set to “high”, and
2. the DATA signal shifts from “low” to “high”
Please refer to the timing diagram below:
V1.3
4
July, 2009
PTC [ PRINCETON TECHNOLOGY CORP ]
