PT6324
PIN DESCRIPTION
Pin Name
CLK
DIN
I/O
I
I
Description
Clock input pin
This pin reads serial data at the rising edge and outputs data at the falling edge.
Data input pin
When this pin acts as input pin, serial data is inputted at the rising edge of the shift
clock (starting from the lower bit)
Serial interface strobe pin
The data input after the STB has fallen is processed as a command. When this in
is “HIGH”, CLK is ignored.
Data output pin (N-channel, Open-drain)
When this pin acts as output pin, serial data is outputted at the falling edge of the
shift clock (starting from the lower bit)
Key data input pins
The data inputted to these pins is latched at the end of the display cycle.
Oscillator input pin
A resistor is connected to this pin to determine the oscillation frequency.
Ground pin
Logic power supply
High-voltage segment output pins
Also acts as the key source
High-voltage segment output pins
High-voltage grid output pins
Pull-down level
Pin No.
1
2
STB
I
3
DOUT
K1 to K2
OSC
GND
VDD
SG1/KS1 to
SG16/KS16
SG17 to SG24
GR1 to GR16
VEE
O
I
I
-
-
O
O
O
-
4
5, 6
7
8, 52
9, 51
10 to 25
26 to 33
34 to 49
50
V1.3
4
PTC [ PRINCETON TECHNOLOGY CORP ]
