PT6963
PIN DESCRIPTION
Pin Name
OSC
DOUT
DIN
CLK
STB
I/O
I
O
I
I
I
Description
Pin No.
Oscillator Input Pin
1
A resistor is connected to this pin to determine the oscillation frequency
Data Output Pin (N-Channel, Open-Drain)
2
This pin outputs serial data at the falling edge of the shift clock.
Data Input Pin
This pin inputs serial data at the rising edge of the shift clock (starting
3
from the lower bit)
Clock Input Pin This pin reads serial data at the rising edge and
4
outputs data at the falling edge.
Serial Interface Strobe Pin
The data input after the STB has fallen is processed as a command.
5
When this pin is “HIGH", CLK is ignored.
Key Data Input Pins
The data sent to these pins are latched at the end of the display
6, 7, 8
cycle. (Internal Pull-Low Resistor)
Power Supply
9, 25
Segment Output Pins (p-channel, open drain)
10 ~ 12
Also acts as the Key Source
14 ~ 20
No Connection
13
Segment Output pins (P-Channel, open drain)
21
Segment / Grid Output Pins
22, 23, 24
Ground Pin
26, 29, 32
27, 28,
Grid Output Pins
30, 31
K1 ~ K3
VDD
SG1/KS1 ~ SG10/KS10
NC
SG11
SG12/GR7 ~ SG14/GR5
GND
GR4 ~ GR1
I
-
O
-
O
O
-
O
V1.3
4