November 2006
rev 0.3
ASM2P3807A
ASM2P3807A
Min
2
Max
1.5
4
1.5
1.5
C
L
= 30pF
f≤ 67MHz
(See figure 3)
0.45
0.45
Symbol
t
PLH
t
PHL
t
R
t
F
t
SK(O)
t
SK(P)
Parameter
Propagation Delay
Output Rise Time
Output Fall Time
Output skew: skew between outputs of
same package (same transition)
Pulse skew: skew between opposite
transitions of same output (|t
PHL
– t
PLH
|)
Package skew: skew between outputs of
different packages at same power supply
voltage, temperature, package type and
speed grade
Conditions
1
Unit
nS
nS
nS
nS
nS
t
SK(T)
0.75
nS
Symbol
t
PLH
t
PHL
t
R
t
F
t
SK(O)
t
SK(P)
Parameter
Propagation Delay
Output Rise Time
Output Fall Time
Output skew: skew between outputs of
same package (same transition)
Pulse skew: skew between opposite
transitions of same output (|t
PHL
– t
PLH
|)
Package skew: skew between outputs of
different packages at same power supply
voltage, temperature, package type and
speed grade
Conditions
1
ASM2P3807A
Min
2
1.5
Max
4.3
1.5
1.5
Unit
nS
nS
nS
nS
nS
C
L
= 50pF
f≤ 40MHz
(See figure 4)
0.35
0.35
t
SK(T)
0.75
nS
NOTES:1. See test circuits and waveforms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
3. t
PLH
, t
PHL
, t
SK(t)
are production tested. All other parameters guaranteed but not production tested.
4. Propagation delay range indicated by Min. and Max. limit is due to V
CC
, operating temperature and process parameters. These propagation delays
limits do not imply skew.
3.3V CMOS 1-TO-10 CLOCK DRIVER
Notice: The information in this document is subject to change without notice.
6 of 18
PULSECORE [ PulseCore Semiconductor ]
