November 2006
rev 2.2
Notebook LCD Panel EMI Reduction IC
Features
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ASM3P18S19B
allows significant system cost savings by reducing the
number of circuit board layers, ferrite beads, shielding, and
other passive components that are traditionally required to
pass EMI regulations.
The ASM3P18S19B modulates the output of a single PLL
in order to “spread” the bandwidth of a synthesized clock,
and more importantly, decreases the peak amplitudes of its
harmonics. This results in significantly lower system EMI
compared to the typical narrow band signal produced by
oscillators and most frequency generators. Lowering EMI
by increasing a signal’s bandwidth is called ‘Spread
Spectrum Clock Generation’.
The ASM3P18S19B uses the most efficient and optimized
modulation
profile
approved
by
the
FCC
and
is
implemented in a proprietary all digital method.
FCC approved method of EMI attenuation.
Provides up to 15dB EMI reduction.
Generates a low EMI Spread Spectrum clock and a
non-spread reference clock of the input frequency.
Optimized for Frequency range from 20 to 40MHz.
Internal loop filter minimizes external components and
board space.
Low Inherent Cycle-to-Cycle jitter.
Two spread % selections: -1.25% to -1.75%.
3.3V Operating Voltage.
Low power CMOS design.
Supports notebook VGA and other LCD timing
controller applications.
Power Down function for mobile application.
Available in Commercial temperature range.
Available in 8-pin SOIC and TSSOP Packages.
RoHS Compliant
Applications
The ASM3P18S19B is targeted towards EMI management
for memory and LVDS interfaces in mobile graphic chipsets
and high-speed digital applications such as PC peripheral
devices, consumer electronics, and embedded controller
systems.
Product Description
The ASM3P18S19B is a Versatile Spread Spectrum
Frequency Modulator designed specifically for input clock
frequencies from 20 to 40MHz. (Refer
Input Frequency and
Modulation Rate Table).
The ASM3P18S19B reduces
electromagnetic interference (EMI) at the clock source,
allowing system wide reduction of EMI of
down stream
clock and data dependent signals. The ASM3P18S19B
Block Diagram
PD#
SRS
VDD
Modulation
XIN/CLKIN
Crystal
Oscillator
Frequency
Divider
Feedback
Divider
PLL
XOUT
Phase
Detector
Loop
Filter
VCO
Output
Divider
REF
ModOUT
VSS
PulseCore Semiconductor Corporation
1715 S. Bascom Ave Suite 200, Campbell, CA 95008
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Tel: 408-879-9077
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Fax: 408-879-9018
www.pulsecoresemi.com
Notice: The information in this document is subject to change without notice.
PULSECORE [ PulseCore Semiconductor ]
