ASM690A/692A
ASM802L/802M
ASM805L
April 2008
rev 1.7
Pin Configuration
Pin Description
Pin Number
ASM690A/
Name
Function
ASM692A
ASM802L/
ASM802M
ASM805L
Voltage supply for RAM. When VCC is above the reset threshold, VOUT
connects to VCC through a P-Channel MOS device. If VCC falls below the
reset threshold, this output will be connected to the backup supply at VBATT
(or VCC, whichever is higher) through the MOS switch to provide continuous
power to the CMOS RAM.
1
1
VOUT
2
3
2
3
VCC
+5V power supply input.
GND
Ground
Power failure monitor input. PFI is connected to the internal power fail
comparator which is referenced to 1.25V. The power fail output (PFO) is
active LOW but remains HIGH if PFI is above 1.25V. If this feature is
unused, the PFI pin should be connected to GND or VOUT.
Power-fail output. PFO is active LOW whenever the PFI pin is less than
1.25V.
4
5
4
5
PFI
PFO
WDI
Watchdog input. The WDI input monitors microprocessor activity. An internal
timer is reset with each transition of the WDI input. If the WDI is held HIGH
or LOW for longer than the watchdog timeout period, typically 1.6 seconds,
RESET (or RESET) is asserted for the reset pulse width time, tRS, of
140ms, minimum.
6
7
6
Active-LOW reset output. When triggered by VCC falling below the reset
threshold or by watchdog timer timeout, RESET pulses low for the reset
pulse width tRS, typically 200ms. It will remain low if VCC is below the reset
-
RESET threshold (4.65V in ASM690A / ASM802L and 4.4V in the ASM692A /
ASM802L) and remains low for 200ms after VCC rises above the reset
threshold.
-
7
8
RESET Active-HIGH reset output. The inverse of RESET.
Auxiliary power or backup-battery input. VBATT should be connected to GND
8
VBATT
if the function is not used. The input has about 40mV of hysteresis to
prevent rapid toggling between VCC and VBATT.
µP Power Supply Supervisor With Battery Backup Switch
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Notice: The information in this document is subject to change without notice.
PULSECORE [ PulseCore Semiconductor ]
