April 2008
rev 1.7
Pin Configuration
ASM690A/692A
ASM802L/802M
ASM805L
Pin Description
Pin Number
ASM690A/
ASM692A
ASM802L/
ASM802M
Voltage supply for RAM. When V
CC
is above the reset threshold, V
OUT
connects to V
CC
through a P-Channel MOS device. If V
CC
falls below the
1
1
V
OUT
reset threshold, this output will be connected to the backup supply at V
BATT
(or V
CC
, whichever is higher) through the MOS switch to provide continuous
power to the CMOS RAM.
2
3
2
3
V
CC
GND
+5V power supply input.
Ground
Power failure monitor input. PFI is connected to the internal power fail
4
4
PFI
comparator which is referenced to 1.25V. The power fail output (PFO) is
active LOW but remains HIGH if PFI is above 1.25V. If this feature is
unused, the PFI pin should be connected to GND or V
OUT
.
5
5
Power-fail output. PFO is active LOW whenever the PFI pin is less than
PFO
1.25V.
Watchdog input. The WDI input monitors microprocessor activity. An internal
timer is reset with each transition of the WDI input. If the WDI is held HIGH
6
6
WDI
or LOW for longer than the watchdog timeout period, typically 1.6 seconds,
RESET (or RESET) is asserted for the reset pulse width time, t
RS
, of
140ms, minimum.
Active-LOW reset output. When triggered by V
CC
falling below the reset
threshold or by watchdog timer timeout, RESET pulses low for the reset
7
-
pulse width t
RS
, typically 200ms. It will remain low if V
CC
is below the reset
RESET
threshold (4.65V in ASM690A / ASM802L and 4.4V in the ASM692A /
ASM802L) and remains low for 200ms after V
CC
rises above the reset
threshold.
-
8
7
8
RESET
V
BATT
Active-HIGH reset output. The inverse of RESET.
Auxiliary power or backup-battery input. V
BATT
should be connected to GND
if the function is not used. The input has about 40mV of hysteresis to
prevent rapid toggling between V
CC
and V
BATT
.
ASM805L
Name
Function
µP Power Supply Supervisor With Battery Backup Switch
Notice: The information in this document is subject to change without notice.
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PULSECORE [ PulseCore Semiconductor ]
