September 2006
rev 0.5
2.5V and 3.3V LVCMOS Clock Distribution Buffer
Features
•
•
•
•
•
•
•
•
•
•
•
Configurable
10
outputs
LVCMOS
clock
distribution buffer
Compatible to single, dual and mixed 3.3V/2.5V
Voltage supply
Wide range output clock frequency up to 250MHz
Designed for mid-range to high-performance
telecom, networking and computer applications
Supports applications requiring clock redundancy
Max. output skew of 200pS (150pS within one
bank)
Selectable output configurations per output bank
Tristatable outputs
32 lead LQFP & TQFP Packages
Pin and Function compatible with MPC9446
Ambient operating temperature range of
-40 to 85°C
PCS2I99446
is specified for the extended temperature range of -40°C to
85°C.
The PCS2I99446 is a full static fanout buffer design
supporting clock frequencies up to 250MHz. The signals
are generated and retimed on-chip to ensure minimal skew
between the three output banks. Two independent
LVCMOS compatible clock inputs are available. This
feature supports redundant clock sources or the addition of
a test clock into the system design. Each of the three
output banks can be individually supplied by 2.5V or 3.3V
supporting mixed voltage applications. The FSELx pins
choose between division of the input reference frequency
by one or two. The frequency divider can be set individually
for each of the three output banks. The PCS2I99446 can
be reset and the outputs are disabled by deasserting the
MR/OE pin (logic high state). Asserting MR/OE will enable
the outputs.
All inputs accept LVCMOS signals while the outputs
provide LVCMOS compatible levels with the capability to
drive terminated 50
Ω
transmission lines. Please consult the
PCS2I99456 specification for a 1:10 mixed voltage buffer
with LVPECL compatible inputs. For series terminated
transmission lines, each of the PCS2I99446 outputs can
drive one or two traces giving the devices an effective
fanout of 1:20. The device is packaged in a
lead LQFP and TQFP Packages.
7x7mm
2
32-
Functional Description
The PCS2I99446 is a 2.5V and 3.3V compatible 1:10 clock
distribution buffer designed for low-voltage mid-range to
high-performance telecom, networking and computing
applications. Both 3.3V, 2.5V and dual supply voltages are
supported for mixed-voltage applications. The PCS2I99446
offers 10 low-skew outputs and 2 selectable inputs for clock
redundancy. The outputs are configurable and support 1:1
and 1:2 output to input frequency ratios. The PCS2I99446
PulseCore Semiconductor Corporation
1715 S. Bascom Ave Suite 200, Campbell, CA 95008
•
Tel: 408-879-9077
•
Fax: 408-879-9018
www.pulsecoresemi.com
Notice: The information in this document is subject to change without notice.
PULSECORE [ PulseCore Semiconductor ]
