September 2006
rev 0.1
Low Power Peak EMI Reducing clock synthesizer
Features
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Generates a 4x low EMI clock at the output
Input frequency: 25 MHz
Integrated loop filter components.
Frequency deviation: ±0.25% (Typ) center spread
Operates with a 3.3V Supply.
Low power CMOS design.
Available in 8-pin SOIC package.
Pin compatible with ICS 341-22
PCS3P7101A
Product Description
The PCS3P7101A is a low cost, single-output, clock
synthesizer. The PCS3P7101A generates a 4x output clock
from a 25 MHz standard fundamental mode, inexpensive
crystal, or clock. It can replace multiple crystals and
oscillators, saving valuable board space and cost. The
device employs Spread Spectrum technique to reduce
system electro-magnetic interference (EMI).
The device also has a power-down feature that tri-state the
clock output and turns off the PLL when the PD pin is taken
low.
Block Diagram
VDD
PD
Modulation
XIN/CLKIN
XOUT
Crystal
Oscillator
Frequency
Divider
Feedback
Divider
Phase
Detector
Loop
Filter
PLL
VCO
Output
Divider
ModOUT
VSS
PulseCore Semiconductor Corporation
1715 S. Bascom Ave Suite 200, Campbell, CA 95008
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Tel: 408-879-9077
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Fax: 408-879-9018
www.pulsecoresemi.com
Notice: The information in this document is subject to change without notice.
PULSECORE [ PulseCore Semiconductor ]
