PCS3P622Z05B/C
PCS3P622Z09B/C
May 2008
rev 0.1
Select Input Decoding table for PCS3P622Z09
PLL
S2
S1
CLKOUT A1 - A4 CLKOUT B1 - B4 DLY_CTRL1 Output Source
Shut-Down
0
0
1
1
0
1
0
1
Three-state
Driven
Three-state
Three-state
Driven
Driven
Driven
Driven
Driven
PLL
PLL
N
N
Y
N
Driven
Reference
Driven
Driven
PLL
Notes: This output is driven and has an internal feedback for the PLL. The load on this output can be adjusted to change the skew between the reference and
the Output.
Spread Spectrum Control and Input-Output Skew Table
Frequency (MHz)
Device
Deviation (±%)
Input-Output Skew (±TSKEW)
PCS3P622Z05B / 09B
PCS3P622Z05C / 09C
0.25
0.5
0.0625
0.125
12
Note: TSKEW is measured in units of the Clock Period
Absolute Maximum Ratings
Symbol
Parameter
Rating
Unit
VDD
Supply Voltage to Ground Potential
-0.5 to +4.6
V
VIN
TSTG
Ts
DC Input Voltage (CLKIN)
Storage temperature
-0.5 to +7
-65 to +125
°C
°C
°C
KV
Max. Soldering Temperature (10 sec)
Junction Temperature
260
150
2
TJ
TDV
Static Discharge Voltage (As per JEDEC STD22- A114-B)
Note: These are stress ratings only and are not implied for functional use. Exposure to absolute maximum ratings for prolonged periods of time may affect
device reliability.
Operating Conditions
Parameter
Description
Min
3.0
Max
3.6
+85
30
Unit
V
VDD
TA
Supply Voltage
Operating Temperature (Ambient Temperature)
Load Capacitance
-40
°C
CL
pF
pF
CIN
Input Capacitance
7
Low Frequency Timing-Safe™ Peak EMI Reduction IC
5 of 15
Notice: The information in this document is subject to change without notice.
PULSECORE [ PulseCore Semiconductor ]
