PACE1750AE
SIGNAL PROPAGATION DELAYS
1,2
20 MHz
Symbol
Parameter
BUS REQ
BUS REQ
BUS GNT
setup
BUS GNT
hold
BUS BUSY
LOW
BUS BUSY
HIGH
BUS BUSY
setup
BUS BUSY
hold
BUS LOCK
LOW
BUS LOCK
HIGH
BUS LOCK
setup
Min
Max
30 MHz
Min
Max
40 MHz
Min
Max
Unit
t
C(BR)L
t
C(BR)H
t
BGV(C)
t
C(BG)X
t
C(BB)L
t
C(BB)H
t
BBV(C)
t
C(BB)X
t
C(BL)L
t
C(BL)H
t
BLV(C)
25
25
5
5
24
20
5
5
25
20
5
5
20
25
0
17
17
5
5
5
17
17
17
0
25
26
5
5
25
0
5
6
0
0
5
6
0
0
25
26
5
5
5
5
5
0
5
5
5
5
5
5
25
25
5
5
24
20
5
5
25
20
5
5
20
25
0
17
17
5
5
5
17
17
17
0
17
20
5
5
25
0
5
5
0
22
22
ns
ns
ns
ns
20
15
ns
ns
ns
ns
21
17
ns
ns
ns
ns
t
C(BL)X (IN)
BUS LOCK
hold
t
C(ST)V
t
C(ST)X
t
C(SA)H
t
C(SA)L
t
RAV(C)
t
C(RA)X
t
C(SDW)L
t
C(SD)H
D/
I
Status, AS
0
-AS
3
, AK
0
-AK
3
,
M/
IO
, R/
W
M/
IO
, R/
W
, D/
I
Status,
AS
0
-AS
3
, AK
0
-AK
3
STRBA HIGH
STRBA LOW
20
20
ns
ns
ns
16
16
ns
ns
ns
ns
ns
t
SAL(IBA)X
Address hold from STRBA LOW
RDYA setup
RDYA hold
STRBD
LOW write
STRBD
HIGH
14
14
14
ns
ns
ns
ns
ns
ns
ns
ns
t
FC(SDR)L
STRBD
LOW read
t
SDRH(IBD)X
STRBD
HIGH
t
SDWH(IBD)X
STRBD
HIGH
t
SDL(SD)H
STRBD
write
t
RDV(C)
t
C(RD)X
t
C(IBA)V
t
FC(IBA)X
t
C(IBD)X
t
C(IBD)X
RDYD setup
RDYD hold
IB
0
-IB
15
IB
0
-IB
15
20
ns
ns
ns
ns
ns
t
IBDRV(C)
IB
0
-IB
15
setup
IB
0
-IB
15
hold (read)
Data valid out (write)
Document #
MICRO-2
REV G
Page 5 of 25
PYRAMID [ PYRAMID SEMICONDUCTOR CORPORATION ]
