PACE1750AE
SINGLE CHIP, 20MHz to 40MHz, ENHANCED
CMOS 16-BIT PROCESSOR
FEATURES
Implements the MIL-STD-1750A Instruction Set
Architecture
Single Chip PACE Technology
TM
CMOS 16-Bit
Processor with 32 and 48-Bit Floating Point
Arithmetic
Form-Fit-Functionally Compatible with the
P1750A
DAIS Instruction Mix Execution Performance
Including Floating Point Arithmetic
1.8 MIPS at 20 MHz
2.7 MIPS at 30 MHz
3.6 MIPS at 40 MHz
Conventional Integer Processing Mix
Performance
5.0 MIPS at 40 MHz
Power BIF Instructions Allow for High
Throughput Implementations of Transcedental
Functions, Navigational Algorithms and DSP
Functions
– Inner Dot Product Instruction for 3X3, 16 Bit
Registers in 150ns (2 clocks per Multiply/
Accumulate step) with 32 Bits Result
– Multiply/Accumulate Instructions for 32 Bit
Registers is 200ns at 40MHz (8 clocks), with
48 Bit Result
– Parameteric Memory Inner-Dot Products for
Matrix Computations up to 64K
– Fast Polynomial expansion algorithms
– Fast context switching with Instruction to
block move up to 16 new mapping memory
page registers
20, 30, and 40 MHz Operation over the Military
Temperature Range
Extensive Error and Fault Management and
Interrupt Capability
26 User Accessible Registers
Single 5V ± 10% Power Supply
Power Dissipation over Military Temperature
Range
<0.5 watts at 20 & 30 MHz
<1.0 watts at 40 MHz
TTL Signal Level Compatible Inputs and
Outputs
Multiprocessor and Co-processor Capability
Two programmable Timers
Available in:
– 64-Pin Top Brazed DIP
– 68-Pin Pin Grid Array (PGA)
– 68-Lead Quad Pack (Leaded Chip Carrier)
GENERAL DESCRIPTION
The PACE1750AE is a general purpose, single chip, 16-
bit CMOS microprocessor designed for high performance
floating point and integer arithmetic, with extensive real
time environment support. It offers a variety of data types,
including bits, bytes, 16-bit and 32-bit integers, and 32-bit
and 48-bit floating point numbers. It provides 13 addressing
modes, including direct, indirect, indexed, based, based
indexed and immediate long and short, and it can access
2 MWords of segmented memory space (64 KWords
segments).
The PACE1750AE offers a well-rounded instruction set
with 130 instruction types, including a comprehensive
integer, floating point, integer-to-floating point and floating
point-to-integer set, a variety of stack manipulation
instructions, high level language support instructions
such as Compare Between Bounds and Loop Control
Instructions. It also offers some unique instructions such
as vectored l/O, supports executive and user modes, and
provides an escape mechanism which allows user-defined
instructions, using a coprocessor.
The chip includes an array of real time application support
resources, such as 2 programmable timers, a complete
interrupt controller supporting 16 levels of prioritized
internal and external interrupts, and a faults and exceptions
handler controlling internally and externally generated
faults.
The microprocessor achieves very high throughput of 3.6
MIPS for a standard real time integer/floating point
instruction mix at a 40 MHz clock. It executes integer Add
in 0.1 µs, integer Multiply in 0.1 µs, Floating Point Add in
0.45 µs, and Floating Point Multiply in 0.225 µs, for
register operands at a 40 MHz clock speed.
The PACE1750AE uses a single multiplexed 16-bit parallel
bus. Status signals are provided to determine whether
the processor is in the memory or I/O bus cycle, reading
and writing, and whether the bus cycle is for data or
instructions.
Document #
MICRO-2
REV G
Revised October 2005
PYRAMID [ PYRAMID SEMICONDUCTOR CORPORATION ]
