欢迎访问ic37.com |
会员登录 免费注册
发布采购

P1754-40QGMB 参数 Datasheet PDF下载

P1754-40QGMB图片预览
型号: P1754-40QGMB
PDF下载: 下载PDF文件 查看货源
内容描述: 单芯片CMOS 40MHz的处理器接口电路( PIC ) [SINGLE CHIP, 40MHz CMOS PROCESSOR INTERFACE CIRCUIT (PIC)]
分类和应用: 微控制器和处理器外围集成电路uCs集成电路uPs集成电路
文件页数/大小: 20 页 / 171 K
品牌: PYRAMID [ PYRAMID SEMICONDUCTOR CORPORATION ]
 浏览型号P1754-40QGMB的Datasheet PDF文件第2页浏览型号P1754-40QGMB的Datasheet PDF文件第3页浏览型号P1754-40QGMB的Datasheet PDF文件第4页浏览型号P1754-40QGMB的Datasheet PDF文件第5页浏览型号P1754-40QGMB的Datasheet PDF文件第6页浏览型号P1754-40QGMB的Datasheet PDF文件第7页浏览型号P1754-40QGMB的Datasheet PDF文件第8页浏览型号P1754-40QGMB的Datasheet PDF文件第9页  
PACE1754
SINGLE CHIP, 40MHz CMOS
PROCESSOR INTERFACE CIRCUIT (PIC)
FEATURES
The PACE1754 (PIC) is a support chip for the
PACE1750A/AE Processor. It eliminates the SSI/
MSI Logic and external system functions
required in typical 1750A implementations.
Provides a significant savings in part-count and
power dissipation enhancing reliability and
overall system speed performance.
Provides an optimal interface when used with
the PACE1753 MMU/COMBO in a full 1750A
implementation.
Provides the following additional important
system functions:
— Programmable READY for memory and I/O
— Automatic READY during self-test and
internal I/O instructions
— 100KHz timer clock output provided
— Programmable system watchdog—ranges
from 1 µs to 1 minute
— Programmable Bus time-out function
— Memory Parity generation/detection
— Error detection of unimplemented memory
and/or I/O space addressing
— First failing memory address register for
diagnostics
— High drive three-state address latches
— Built-in system test program—automatically
tests the PACE1750A/AE CPU, PACE1753
MMU/COMBO, PACE1754 PIC and system
address lines as well as memory and I/O
strobes
— System configuration decoding and buffering
— Interrupt acknowledge decoder and strobe
— Start up ROM support per MIL-STD-1750A
— Memory or I/O READ/WRITE three-state
strobes with external three-state control for
DMA applications
20, 30 and 40 MHz operation over full Military
Temperature Range
Single 5V ± 10% Power Supply
Power Dissipation over Military Temperature
Range
< 0.25 watts at 20 MHz
< 0.30 watts at 30 MHz
< 0.35 watts at 40 MHz
Available in:
— 64-Pin DIP or Gull Wing (50 Mil Pin centers)
— 68-Pin Pin Grid Array (PGA) (100 Mil centers)
— 68-Lead Quad Pack
PACE1754 PROCESSOR INTERFACE
CIRCUIT DESCRIPTION
The PACE1754 Processor Interface Circuit (PIC) is a
single chip implementation of many special system
functions that are often required when using the
PACE1750A/AE, single chip, 40MHz CMOS
Microprocessor. The PIC allows a system designer to
design a higher performance, more effecient
microprocessor system which uses less power and takes
up less board space than was previously possible.
In addition to providing significant savings in part count
and power dissipation the PIC uses only a 5V ±10%, single
supply and operates at 20, 30 and 40 MHz over the fully
Military Temperature Range. The PIC provides many
important system functions. These functions are governed
by respective bit positions in a programmable Control
Register which is incorporated in the PIC. The individual
bits of the control register are set to select the various
features and are set to a specified default value upon
Reset.
Document #
MICRO-5
REV C
Revised November 2005