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P4C116-10SM 参数 Datasheet PDF下载

P4C116-10SM图片预览
型号: P4C116-10SM
PDF下载: 下载PDF文件 查看货源
内容描述: 超高速2K x 8静态CMOS RAMS [ULTRA HIGH SPEED 2K x 8 STATIC CMOS RAMS]
分类和应用:
文件页数/大小: 14 页 / 239 K
品牌: PYRAMID [ PYRAMID SEMICONDUCTOR CORPORATION ]
 浏览型号P4C116-10SM的Datasheet PDF文件第1页浏览型号P4C116-10SM的Datasheet PDF文件第2页浏览型号P4C116-10SM的Datasheet PDF文件第3页浏览型号P4C116-10SM的Datasheet PDF文件第4页浏览型号P4C116-10SM的Datasheet PDF文件第6页浏览型号P4C116-10SM的Datasheet PDF文件第7页浏览型号P4C116-10SM的Datasheet PDF文件第8页浏览型号P4C116-10SM的Datasheet PDF文件第9页  
P4C116/P4C116L  
AC CHARACTERISTICS—WRITE CYCLE  
(VCC = 5V ± 10%, All Temperature Ranges)(2)  
–20  
–15  
–35  
–10  
–12  
–25  
Unit  
Parameter  
Write Cycle Time  
Chip Enable Time to End of Write  
Address Valid to End of Write  
Address Set-up Time  
Sym.  
Min Max Min Max Min Max Min  
Min Max Min Max  
Max  
tWC  
10  
8
15  
12  
12  
0
12  
0
20  
15  
15  
0
15  
0
25  
18  
18  
0
18  
0
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
12  
10  
10  
0
10  
0
35  
25  
25  
0
20  
0
tCW  
tAW  
tAS  
tWP  
tAH  
tDW  
tDH  
tWZ  
tOW  
8
0
8
Write Pulse Width  
Address Hold Time  
Data Valid to End of Write  
Data Hold Time  
Write Enable to Output in High Z  
Output Active from End of Write  
0
7
0
8
0
10  
0
12  
0
15  
0
20  
0
6
7
8
10  
15  
15  
0
0
0
0
0
0
TIMING WAVEFORM OF WRITE CYCLE NO. 1 (WE CONTROLLED)(10,11)  
TIMING WAVEFORM OF WRITE CYCLE NO. 2 (CE CONTROLLED)(10)  
Notes:  
10. CE and WE must be LOW for WRITE cycle.  
13. Write Cycle Time is measured from the last valid address to the first  
transitioning address.  
11. OE is LOW for this WRITE cycle to show t and t  
.
12. If CE goes HIGH simultaneously with WE HIWGZH, theOoWutput remains  
in a high impedance state  
Document # SRAM110 REV A  
Page 5 of 14