P4C188/188L
AC CHARACTERISTICS—READ CYCLE
(V
CC
= 5V ± 10%, All Temperature Ranges)
(2)
Sym.
t
RC
t
AA
t
AC
t
OH
t
LZ
t
HZ
t
PU
t
PD
Parameter
-10
12
10
10
2
2
5
0
10
0
2
2
-12
15
12
12
2
2
6
0
12
-15
20
15
15
2
3
6
0
15
-20
25
20
20
2
3
8
0
20
-25
35
25
25
2
3
10
0
25
-35
45
35
35
2
3
20
0
35
-45
Min Max Min Max Min Max Min Max Min Max Min Max Min Max
45
45
Unit
ns
ns
ns
ns
ns
Read Cycle Time 10
Address Access
Time
Chip Enable
Access Time
Output Hold from
Address Change
Chip Enable to
Output in Low Z
Chip Disable to
Output in High Z
Chip Enable to
Power Up Time
Chip Disable to
Power Down
Time
25
ns
ns
45
ns
TIMING WAVEFORM OF READ CYCLE NO. 1
(5)
TIMING WAVEFORM OF READ CYCLE NO. 2
(6)
Notes:
5.
CE
is LOW and
WE
is HIGH for READ cycle.
6.
WE
is HIGH, and address must be valid prior to or coincident with
CE
transition LOW.
7. Transition is measured ±200mV from steady state voltage prior to
change with specified loading in Figure 1. This parameter is sampled
and not 100% tested.
8. Read Cycle Time is measured from the last valid address to the first
transitioning address.
Document #
SRAM112
REV A
Page 4 of 12
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