Internet Data Sheet
HYB25DC512[800/160]C[E/F]
512-Mbit Double-Data-Rate SDRAM
%
$
ꢅꢀ
%
$
ꢁꢀ
ꢅꢀ
Uꢀ
$
ꢅ
ꢆꢀ
$
ꢅ
ꢅꢀ
$
ꢅ
ꢁꢀ
$
ꢉꢀ
$
ꢇꢀ
DWLQ
Zꢀ
$
ꢊꢀ
$
ꢂꢀ
$
ꢋꢀ
$
ꢈꢀ
$
ꢌꢀ
$
ꢆꢀ
ꢁꢀ
Zꢀ
$
ꢅꢀ
'6
Zꢀ
$
ꢁꢀ
'//ꢀ
Zꢀ
ꢀ
ꢁꢀ
UH
2
SH
U
Jꢀ
02
'
(ꢀ
JꢃꢀD
G
G
0
3
%
7
ꢁ
ꢈꢉꢁꢀ
TABLE 8
Extended Mode Register
Field
DLL
Bits
Type1)
Description
DLL Status
0
w
0B
1B
Enabled
Disabled
DS
1
Drive Strength
0B
1B
Normal
Weak
MODE
[12:3]
Operating Mode
00000000000BNormal Operation
Notes
1. A2 must be 0 to provide compatibility with early DDR devices
2. All other bit combinations are RESERVED.
1) w = write only register bit
Rev. 1.3, 2006-12
14
03292006-W2FE-ELDX
QIMONDA [ QIMONDA AG ]
