Internet Data Sheet
HY[B/I]18T1G[40/80/16]0B[C/F](L/V)
1-Gbit Double-Data-Rate-Two SDRAM
Ball#
Name
Ball
Type
Buffer
Type
Function
J1
J7
VDDL
PWR
PWR
—
—
Power Supply
Power Supply
VSSDL
Not Connected ×4 Organizations
A1, A2, A8, A9, NC
E2, F9, H1,F1,
R7, H9, W1,
W2, W8, W9,
R3
NC
—
Not Connected
Not Connected ×8 Organization
A1, A2, A8, A9, NC
R7, W1, W2,
NC
—
Not Connected
W8, W9, R3
Other Balls ×4×8 Organizations
K9
ODT
I
SSTL
On-Die Termination Control
TABLE 8
Abbreviations for Ball Type
Abbreviation
Description
I
Standard input-only ball. Digital levels.
Output. Digital levels.
I/O is a bidirectional input/output signal.
Input. Analog levels.
Power
O
I/O
AI
PWR
GND
NC
Ground
Not Connected
TABLE 9
Abbreviations for Buffer Type
Abbreviation
Description
SSTL
Serial Stub Terminated Logic (SSTL_18)
Low Voltage CMOS
LV-CMOS
CMOS
OD
CMOS Levels
Open Drain. The corresponding ball has 2 operational states, active low and tristate, and
allows multiple devices to share as a wire-OR.
Rev. 1.3, 2007-07
11
03062006-ZNH8-HURV
QIMONDA [ QIMONDA AG ]
