Internet Data Sheet
HYS[64/72]T[32/64/128]xx0HU–[3/3S/3.7/5]–A
Unbuffered DDR2 SDRAM Modules
3.2
DC Operating Conditions
This chapter contains the DC operating conditions tables.
TABLE 12
Operating Conditions
Parameter
Symbol
Values
Min.
Unit
Notes
Max.
Operating temperature (ambient)
DRAM Case Temperature
TOPR
TCASE
TSTG
0
+65
+95
+100
+105
90
×C
×C
×C
kPa
%
1)2)3)4)
5)
0
Storage Temperature
– 50
+69
10
Barometric Pressure (operating & storage)
Operating Humidity (relative)
PBar
HOPR
1) DRAM Component Case Temperature is the surface temperature in the center on the top side of any of the DRAMs.
2) Within the DRAM Component Case Temperature Range all DRAM specifications will be supported
3) Above 85 °C DRAM Case Temperature the Auto-Refresh command interval has to be reduced to tREFI = 3.9 µs
4) Self-Refresh period is hard-coded in the DRAMs and therefore it is imperative that the system ensures the DRAM is below 85 °C Case
Temperature before initiating Self-Refresh operation.
5) Up to 3000 m.
TABLE 13
Supply Voltage Levels and DC Operating Conditions
Parameter
Symbol
Values
Min.
Unit
Notes
Nom.
Max.
Device Supply Voltage
Output Supply Voltage
Input Reference Voltage
SPD Supply Voltage
VDD
1.7
1.8
1.9
V
1)
2)
VDDQ
VREF
VDDSPD
VIH(DC)
VIL(DC)
IL
1.7
1.8
1.9
V
0.49 x VDDQ
0.5 x VDDQ
0.51 x VDDQ
V
1.7
—
—
—
—
3.6
V
DC Input Logic High
V
REF + 0.125
V
V
5
DDQ + 0.3
V
DC Input Logic Low
– 0.30
– 5
REF – 0.125
V
3)
In / Output Leakage Current
µA
1) Under all conditions, VDDQ must be less than or equal to VDD
2) Peak to peak AC noise on VREF may not exceed ± 2% VREF (DC).VREF is also expected to track noise in VDDQ
3) Input voltage for any connector pin under test of 0 V ≤ VIN ≤ VDDQ + 0.3 V; all other pins at 0 V. Current is per pin
.
Rev. 1.41, 2007-05
17
03292006-EZUJ-JY4S
QIMONDA [ QIMONDA AG ]
