Internet Data Sheet
HYS[64/72]T256xxxHU–[3/…/5]–A
Unbuffered DDR2 SDRAM Modules
TABLE 2
Performance table for –3.7
Product Type Speed Code
Speed Grade
Max. Clock Frequency
@CL5
@CL4
@CL3
Min. RAS-CAS-Delay
Min. Row Precharge Time
Min. Row Active Time
Min. Row Cycle Time
–3.7
PC2–4200 4–4–4
Unit
—
MHz
MHz
MHz
ns
ns
ns
ns
f
CK5
f
CK4
f
CK3
t
RCD
t
RP
t
RAS
t
RC
266
266
200
15
15
45
60
TABLE 3
Performance table for
–5
Product Type Speed Code
Speed Grade
max. Clock Frequency
@CL5
@CL4
@CL3
min. RAS-CAS-Delay
min. Row Precharge Time
min. Row Active Time
min. Row Cycle Time
f
CK5
f
CK4
f
CK3
t
RCD
t
RP
t
RAS
t
RC
–5
PC2-3200 3–3–3
200
200
200
15
15
40
55
Unit
—
MHz
MHz
MHz
ns
ns
ns
ns
Rev. 1.32, 2006-09
03062006-5RK8-1X8J
4