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HYS72D128321GBR-7-B 参数 Datasheet PDF下载

HYS72D128321GBR-7-B图片预览
型号: HYS72D128321GBR-7-B
PDF下载: 下载PDF文件 查看货源
内容描述: 184 - 针录得双数据速率SDRAM模块 [184 - Pin Registered Double-Data-Rate SDRAM Module]
分类和应用: 内存集成电路动态存储器双倍数据速率时钟
文件页数/大小: 51 页 / 3052 K
品牌: QIMONDA [ QIMONDA AG ]
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Internet Data Sheet
HYS72D[64/128/256]xxx[G/H]BR–[5/6/7]–B
Registered DDR SDRAM Module
1.2
Description
The HYS72D[64/128/256]xxx[G/H]BR–[5/6/7]–B are low profile versions of the standard Registered DIMM modules with
1.1” inch (28.58) and 1.2” inch (30,40 mm) height for 1U Server Applications. The Low Profile DIMM versions are available as
64M
×
72(512 MB), 128M
×
72 (1 GB) and 256M
×
72 (2 GB).
The memory array is designed with Double Data Rate Synchronous DRAMs for ECC applications. All control and address
signals are re-driven on the DIMM using register devices and a PLL for the clock distribution. This reduces capacitive loading
to the system bus, but adds one cycle to the SDRAM timing. A variety of de coupling capacitors are mounted on the PC board.
The DIMMs feature serial presence detect based on a serial E
2
PROM device using the 2-pin I
2
C protocol. The first 128 bytes
are programmed with configuration data and the second 128 bytes are available to the customer.
TABLE 2
Ordering Information for Lead - Containing Products
Product Type
1)
PC3200 (CL=3)
HYS72D64301GBR–5–B
HYS72D128300GBR–5–B
HYS72D128321GBR–5–B
HYS72D256220GBR–5–B
PC2700 (CL=2.5)
HYS72D64301GBR–6–B
HYS72D128300GBR–6–B
HYS72D128321GBR–6–B
HYS72D256320GBR–6–B
HYS72D256220GBR–6–B
PC2100 (CL=2)
HYS72D128300GBR–7–B
HYS72D128321GBR–7–B
HYS72D256220GBR–7–B
HYS72D256320GBR–7–B
PC2100R–20330–C0
PC2100R–20330–B0
PC2100R–20330–D0
PC2100R–20330–D0
one rank 1 GByte Reg. ECC DIMM
two ranks1 GByte Reg. ECC DIMM
two ranks 2 GByte Reg. ECC DIMM
two ranks 2 GByte Reg. ECC DIMM
512 MBit (×4)
512 MBit (×8)
512 MBit (×4)
512 MBit (×4)
PC2700R–25330–A0
PC2700R–25330–C0
PC2700R–25330–B0
PC2700R–25330–D0
PC2700R–25330–D0
one rank 512 MByte Reg. ECC DIMM
one rank 1 GByte Reg. ECC DIMM
two ranks 1 GByte Reg. ECC DIMM
two ranks 2 GByte Reg. ECC DIMM
two ranks 2 GByte Reg. ECC DIMM
512 MBit (×4)
512 MBit (×4)
512 MBit (×8)
512 MBit (×4)
512 MBit (×4)
PC2700R–30331–A0
PC3200R–30331–C0
PC3200R–30331–B0
PC3200R–30331–D0
one rank 512 MByte Reg. ECC DIMM
one rank 1 GByte Reg. ECC DIMM
two ranks 1 GByte Reg. ECC DIMM
two ranks 2 GByte Reg. ECC DIMM
512 MBit (×8)
512 MBit (×4)
512 MBit (×8)
512 MBit (×4)
Compliance Code
2)
Description
SDRAM
Technology
1) All product types end with a place code designating the silicon-die revision. Reference information available on request.
Example: HYS72D128300GBR-5-B, indicating Rev.B die are used for SDRAM components.
2) The Compliance Code is printed on the module labels and describes the speed sort (for example “PC2100R”), the latencies (for example
“20330” means CAS latency of 2.0 clocks, Row-Column-Delay (RCD) latency of 3 clocks and Row Pre-charge latency of 3 clocks), JEDEC
SPD code definition version 0, and the Raw Card used for this module.
Rev. 1.42, 2007-01
03292006-7CZA-YS85
4