Table 1.4 SPI Pinlist
With or without EEPROM
Pin
Name
Type
Function
Notes
If Unused
1
SNS3
SNS3K
SNS4
SNS4K
SNS5
SNS5K
SNS6
SNS6K
SNS7
SNS7K
n/c
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
-
Sense pin
Sense pin
Sense pin
Sense pin
Sense pin
Sense pin
Sense pin
Sense pin
Sense pin
Sense pin
Unused
To CS3
Open
Vss or open
Open
2
To CS3 + Key
3
To CS4
4
To CS4 + Key
Vss or open
Open
5
To CS5
6
To CS5 + Key
Vss or open
Open
7
To CS6
8
To CS6 + Key
Vss or open
Open
9
To CS7
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
To CS7 + Key
Vss or open
-
-
n/c
-
Unused
-
To CS8
-
SNS8
SNS8K
SNS9
SNS9K
Vss
I/O
I/O
I/O
I/O
Pwr
O
Sense pin
Sense pin
Sense pin
Sense pin
Ground
Open
To CS8 + Key
Vss or open
Open
To CS9
To CS9 + Key
Vss or open
-
0V
CKEE
DOEE
DIEE
EEPROM
EEPROM
EEPROM
Unused
Wake
SPI handshake
EEPROM
Clock to EEPROM
Data out to EEPROM
Data in from EEPROM
To Vss
Open
O
Open
I
Vdd
n/c
-
-
WAKE
CRDY
CSEE
I
Wake from sleep
1 = Comms ready; Use pull-up R
EEPROM chip select; Use pull-down R
Vdd
OD
O
-
Open
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
n/c
CLK
I
unused
SPI clock
SPI data
-
Vss
I
I/O
I
From host
-
DO
To host; use pull-up R
-
DI
SPI data
From host
-
/SS
I
SPI Slave select
Unused
From host
-
n/c
I
To Vss
-
n/c
I
Unused
To Vss
-
CMODE
SYNC
LED/STAT
RST
I
Comms select
Sync In
To Vdd
-
I/O
O
I
Always use pull-up R
20K ~ 220K to Vdd
LED & Status
Reset input
Power
-
Open
Active low
Vdd
Vdd
Pwr
I
+3.3 ~ +5V
-
-
OSC1
OSC2
n/c
Resonator
Resonator
Unused
12MHz - Can also be ext clock in
O
-
-
Open
-
-
n/c
-
Unused
-
-
-
n/c
-
Unused
-
n/c
-
Unused
-
-
SNS0
SNS0K
SNS1
SNS1K
SNS2
SNS2K
I/O
I/O
I/O
I/O
I/O
I/O
Sense pin
Sense pin
Sense pin
Sense pin
Sense pin
Sense pin
To CS0 + Key
To CS0
To CS1 + Key
To CS1
To CS2 + Key
To CS2
Open
Vss or open
Open
Vss or open
Open
Vss or open
I
CMOS input
CMOS I/O
I/O
O
CMOS output (push-pull)
CMOS open drain I/O
Power / ground
OD
Pwr
LQ
7
Copyright © 2003-2005 QRG Ltd
QT1100A-ISG R3.02/1105
QUANTUM [ QUANTUM RESEARCH GROUP ]
