Figure 1-3 E401 PCB Layout (1-sided, 144 x 20 x 0.6mm)
1.7 Drift Compensation
The device features an ability to compensate for slow drift
due to environmental factors such as temperature changes or
humidity. Drift compensation is performed completely under
host control via a special drift command. See Section 3.3.4
for further details.
glass. The worst panel is thick plastic. Granularity due to poor
coupling can be compensated for by the use of larger values
of Cs1 and Cs2.
A table of suggested values for Cs1 and Cs2 for no missing
position values is shown in Table 1-2. Values of Cs smaller
than those shown in the table can cause skipping of position
codes. Code skipping may be acceptable in many
applications where fine position data is not required. Smaller
Cs capacitors have the advantage of requiring shorter
acquisition bursts and hence lower power drain.
Larger values of Cs1 and Cs2 improve granularity at the
expense of longer burst lengths and hence more average
power. Conversely where power is more important than
granularity, Cs1 and Cs2 can be reduced to save power at
the expense of resolution. Optimal values depends on the
user application, and some experimentation is necessary.
Cs1 and Cs2 should be matched to within 10% of each other
(ie, 5% tolerance, X7R dielectric) for best left-right end zone
balance, using the E401 reference layout (Figure 1-3). See
also Section 2.3. Linearity is not greatly affected by Cs
mismatching. If the error is too extreme, one of the end
locations could attempt to exceed the physical limits of the
slider. At or below this 10% guideline, the device will correctly
calibrate the end locations to within 1 or 2 millimeters for a
100mm slider.
In critical applications, the capacitors should be sort-matched,
or, the host device should store end location calibration
correction data based on a one-time factory calibration
procedure. Alternatively the Rs end resistors can be factory
adjusted to determine end locations more precisely.
1.8 Error Flag
An error flag bit (bit 1) is provided in the standard response
byte but only when there is no touch detection present
(Section 3.3); if the Error bit is high, it means the signal has
fallen significantly below the calibration level when not
touched. If this happens the device could report somewhat
inaccurate position values when touched.
This condition can self-correct via the drift compensation
process after some time under host control (Section 3.3.4).
Alternatively, the host controller can cause the device to
recalibrate immediately by issuing a calibration command
(Section 3.3.2), perhaps also followed by an end-calibrate
command (Section 3.3.3) if desired.
2 Wiring & Parts
The device should be wired according to Figure 1-1. An
example PCB layout (of the E401 eval board) is shown in
Figure 1-3.
2.1 Slider Strip Construction
The slider should be a resistive strip of about 100K ohms
+/-50%, from end to end, of a suitable length and width. Arcs
and semicircles are also possible. There are no known length
restrictions.
The slider can be made of a series chain of discrete resistors
with copper pads on a PCB, or from ITO (Indium Tin Oxide, a
clear conductor used in LCD panels and touch screens) over
a display. Carbon thick-film paste can also be used, however
linearity might be a problem as these films are notoriously
difficult to control without laser trimming or scribing.
The linearity of the slider is governed largely by the linearity
and consistency of the resistive slider element. Positional
accuracy to within 5% is routinely achievable with good grade
resistors and a uniform construction method.
2.3 Rs End Resistors
In auto end-cal mode, Rs1 and Rs2 are used only for EMC
and ESD protection; they should be no more than ~1K ohms.
However they are optional, and in the E401 eval board they
are set to 0.
In fixed cal mode, Rs1 and Rs2 can be varied to adjust the
ends of the slider outwards. Typically they will range from 10K
to 20K each. In fixed cal mode, the end resistors should be
selected to achieve a reasonable 0..127 position
correspondence with the desired mechanical range; in
particular, they should be adjusted so that the reported
2.2 Cs Sample Capacitors
Cs1 and Cs2 are the charge sensing capacitors , of type X7R.
The optimal values of Cs1 and Cs2 depend on the thickness
of the panel and its dielectric constant. Lower coupling to a
finger caused by a low dielectric constant and/or thicker panel
will cause the position result to become granular and more
subject to position errors. The ideal panel is made of thin
Table 1-2 Recommended Cs vs. Materials
Thickness,
mm
0.4
0.8
1.5
2.5
3.0
4.0
Acrylic
(
ε
R
=2.8)
10nF
22nF
47nF
100nF
-
-
Borosilicate glass
(
ε
R
=4.8)
5.6nF
10nF
22nF
39nF
47nF
100nF
lQ
4
QT401 R10.04/0505
QUANTUM [ QUANTUM RESEARCH GROUP ]
