FM1110 NV Quad State Saver
Block Diagram and Truth Table
INPUTS
CLK
↑
↑
H or L
X
OUTPUT
Q
N
L
H
Q
0
Hi-Z
D
N
CLK
NV
State
Saver
Q
N
EN
EN
H
H
H
L
L
H
X
↑
Q
0
D
N
L
H
X
X
Low voltage level
High voltage level
Don’t Care
CLK rising edge
Previous output state before CLK ↑
Pin Descriptions
Pin Name
D(3:0)
Q(3:0)
CLK
I/O
I
O
I
Description
Data inputs
Data outputs
Clock: On a rising edge of CLK, the D
N
inputs are transferred to the Q
N
outputs. While
CLK is high or low, the Q
N
outputs do not change regardless of the state of the data
inputs. See truth table.
Enable. This active-high input enables the device. When low, inputs are ignored and
updates to the nonvolatile cells are prevented. When high, the device operates
normally.
Power Supply (4.5V to 5.5V)
Ground
EN
I
VDD
VSS
Supply
Supply
Rev. 4.0
Oct 2012
Page 2 of 8
RAMTRON [ RAMTRON INTERNATIONAL CORPORATION ]
