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FM31276 参数 Datasheet PDF下载

FM31276图片预览
型号: FM31276
PDF下载: 下载PDF文件 查看货源
内容描述: 5V集成处理器伴侣与记忆 [5V Integrated Processor Companion with Memory]
分类和应用:
文件页数/大小: 25 页 / 330 K
品牌: RAMTRON [ RAMTRON INTERNATIONAL CORPORATION ]
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FM31278/276/274/272 - 5V I2C Companion  
01h  
CAL/Control  
D7  
D6  
D5  
D4  
D3  
D2  
D1  
D0  
OSCEN  
Reserved  
CALS  
CAL.4  
CAL.3  
CAL.2  
CAL.1  
CAL.0  
/OSCEN  
/Oscillator Enable. When set to 1, the oscillator is halted. When set to 0, the oscillator runs. Disabling the  
oscillator can save battery power during storage. On a power-up without battery, this bit is set to 1. Battery-  
backed, read/write.  
Reserved  
CALS  
Reserved bits. Do not use. Should remain set to 0.  
Calibration sign. Determines if the calibration adjustment is applied as an addition to or as a subtraction from  
the time-base. Calibration is explained on page 7. Nonvolatile, read/write.  
These five bits control the calibration of the clock. Nonvolatile, read/write.  
CAL.4-0  
00h  
Flags/Control  
D7  
D6  
D5  
D4  
D3  
D2  
D1  
D0  
Reserved  
CF  
Reserved  
Reserved  
Reserved  
CAL  
W
R
CF  
Century Overflow Flag. This bit is set to a 1 when the values in the years register overflows from 99 to 00. This  
indicates a new century, such as going from 1999 to 2000 or 2099 to 2100. The user should record the new  
century information as needed. This bit is cleared to 0 when the Flag register is read. It is read-only for the user.  
Battery-backed.  
Calibration Mode. When set to 1, the clock enters calibration mode. When CAL is set to 0, the clock operates  
normally, and the CAL/PFO pin is controlled by the power fail comparator. Battery-backed, read/write.  
Write Time. Setting the W bit to 1 freezes the clock. The user can then write the timekeeping registers with  
updated values. Resetting the W bit to 0 causes the contents of the time registers to be transferred to the  
timekeeping counters and restarts the clock. Battery-backed, read/write.  
CAL  
W
R
Read Time. Setting the R bit to 1 copies a static image of the timekeeping core and place it into the user  
registers. The user can then read them without concerns over changing values causing system errors. The R bit  
going from 0 to 1 causes the timekeeping capture, so the bit must be returned to 0 prior to reading again.  
Battery-backed, read/write.  
Reserved  
Reserved bits. Do not use. Should remain set to 0.  
Rev. 2.0  
Dec. 2007  
Page 14 of 25