RTL8110S-32/RTL8110S-64
Datasheet
Symbol
PAR64
Type
T/S
Pin No.
(128QFP)
Pin No.
(233BGA)
R2
Description
Parity Upper DWORD
is an even parity bit that protects
AD[64:32] and C/BE[7:4]. PAR64 must be valid one
clock after each address phase on any transaction in which
REQ64B is asserted.
5.3. EEPROM
Table 3.
Symbol
EESK
EEDI/AUX
Type
O
I
Pin No
Pin No
(128QFP) (233BGA)
111
A11
109
B11
EEPROM
Description
Serial data clock
EEDI:
Serial data input
AUX:
Input pin to detect if Aux. Power exists or not on initial
power-on.
This pin should be connected to EEPROM. To support wakeup
from ACPI D3cold or APM power-down, this pin must be pulled
high to aux. power via a resistor. If this pin is not pulled high to
Aux. Power, the RTL8110S assumes that no Aux. Power exists.
Serial data output
EECS:
EEPROM chip select
BROMCSB:
This is the chip select signal of the Boot PROM.
EEDO
EECS/BRO
MCSB
O
O
108
106
A12
B12
5.4. Transceiver Interface
Table 4.
Symbol
MDI[0]+
MDI[0]−
Type
I/O
I/O
Pin No
(128QFP)
1
2
Pin No
(233BGA)
C2
D1
Transceiver Interface
Description
In MDI mode, this is the first pair in 1000Base-T, i.e. the
BI_DA+/- pair, and is the transmit pair in 10Base-T and
100Base-TX.
In MDI crossover mode, this pair acts as the BI_DB+/- pair,
and is the receive pair in 10Base-T and 100Base-TX.
In MDI mode, this is the second pair in 1000Base-T, i.e. the
BI_DB+/- pair, and is the transmit pair in 10Base-T and
100Base-TX.
In MDI crossover mode, this pair acts as the BI_DA+/- pair,
and is the transmit pair in 10Base-T and 100Base-TX.
In MDI mode, this is the third pair in 1000Base-T, i.e. the
BI_DC+/- pair.
In MDI crossover mode, this pair acts as the BI_DD+/- pair.
In MDI mode, this is the fourth pair in 1000Base-T, i.e. the
BI_DD+/- pair.
In MDI crossover mode, this pair acts as the BI_DC+/- pair.
9
Track ID: JATR-1076-21
Rev. 1.4
MDI[1]+
MDI[1]−
I/O
I/O
5
6
D2
E1
MDI[2]+
MDI[2]−
MDI[3]+
MDI[3]−
I/O
I/O
I/O
I/O
14
15
18
19
F1
G2
G1
H2
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