HD74HC373, HD74HC533
Octal D-type Transparent Latches (with 3-state outputs)
Octal D-type Transparent Latches (with inverted 3-state outputs)
REJ03D0619-0200
(Previous ADE-205-498)
Rev.2.00
Mar 30, 2006
Description
When the latch enable input is high, the Q outputs of HD74HC373 will follow the D inputs and the Q outputs of
HD74HC533 will follow the inversion of the D inputs. When the latch enable goes low, data at the D inputs will be
retained at the outputs until latch enable returns high again. When a high logic level is applied to the output control
input, all outputs go to a high impedance state, regardless of what signals are present at the other inputs and the state of
the storage elements.
Features
•
High Speed Operation: t
pd
(D to Q) = 16 ns typ (C
L
= 50 pF)
•
High Output Current: Fanout of 15 LSTTL Loads
•
Wide Operating Voltage: V
CC
= 2 to 6 V
•
Low Input Current: 1
µA
max
•
Low Quiescent Supply Current: I
CC
(static) = 4
µA
max (Ta = 25°C)
•
Ordering Information
Part Name
HD74HC373P
HD74HC533P
HD74HC373FPEL
HD74HC533FPEL
HD74HC533RPEL
Package Type
DILP-20 pin
SOP-20 pin (JEITA)
SOP-20 pin (JEDEC)
Package Code
(Previous Code)
PRDP0020AC-B
(DP-20NEV)
PRSP0020DD-B
(FP-20DAV)
Package
Abbreviation
P
FP
—
EL (2,000 pcs/reel)
EL (1,000 pcs/reel)
ELL (2,000 pcs/reel)
Taping Abbreviation
(Quantity)
PRSP0020DC-A
RP
(FP-20DBV)
PTSP0020JB-A
HD74HC373TELL
TSSOP-20 pin
T
(TTP-20DAV)
Note: Please consult the sales office for the above package availability.
Function Table
Output Control
L
L
L
Note:
Enable G
H
H
L
D
H
L
X
HD74HC373
Q
H
L
No change
Z
HD74HC533
Q
L
H
No change
Z
H
X
X
1. H; High level, L; Low level, X; Irrelevant, Z; High impedance
Rev.2.00 Mar 30, 2006 page 1 of 9