HD74LV1GT125A
Bus Buffer Gate with 3–state Output /
CMOS Logic Level Shifter
REJ03D0123-0900
Rev.9.00
Mar 21, 2008
Description
The HD74LV1GT125A has a bus buffer gate with 3–state output in a 5 pin package. Output is disabled when the
associated output enable (OE) input is high. To ensure the high impedance state during power up or power down,
OE
should be connected to V
CC
through a pull-down resistor; the minimum value of the resistor is determined by the current
sourcing capability of the driver. The input protection circuitry on this device allows over voltage tolerance on the
input, allowing the device to be used as a logic–level translator from 3.0 V CMOS Logic to 5.0 V CMOS Logic or from
1.8 V CMOS logic to 3.0 V CMOS Logic while operating at the high-voltage power supply. Low voltage and high-
speed operation is suitable for the battery powered products (e.g., notebook computers), and the low power
consumption extends the battery life.
Features
•
The basic gate function is lined up as Renesas uni logic series.
•
Supplied on emboss taping for high-speed automatic mounting.
•
TTL compatible input level.
Supply voltage range : 3.0 to 5.5 V
Operating temperature range : –40 to +85°C
•
Logic-level translate function
3.0 V CMOS logic
→
5.0 V CMOS logic (@V
CC
= 5.0 V)
1.8 V or 2.5 V CMOS logic
→
3.3 V CMOS logic (@V
CC
= 3.3 V)
•
All inputs V
IH
(Max.) = 5.5 V (@V
CC
= 0 V to 5.5 V)
All outputs V
O
(Max.) = 5.5 V (@V
CC
= 0 V, Output : Z)
•
Output current ±6 mA (@V
CC
= 3.0 V to 3.6 V), ±12 mA (@V
CC
= 4.5 V to 5.5 V)
•
All the logical input has hysteresis voltage for the slow transition.
•
Ordering Information
Part Name
HD74LV1GT125ACME
HD74LV1GT125AVSE
Note:
Package Type
CMPAK–5 pin
VSON–5 pin
Package Code
(Previous Code)
PTSP0005ZC-A
(CMPAK-5V)
PUSN0005KA-A
(TNP-5DV)
Package
Abbreviation
CM
VS
Taping Abbreviation
(Quantity)
E (3000 pcs/reel)
E (3000 pcs/reel)
Please consult the sales office for the above package availability.
REJ03D0123-0900 Rev.9.00, Mar 21, 2008
Page 1 of 7
RENESAS [ RENESAS TECHNOLOGY CORP ]
