HD74LS374
Octal D-type Edge-triggered Flip-Flops (with three-state outputs)
REJ03D0483–0200
Rev.2.00
Feb.18.2005
The HD74LS374, 8-bit register features totem-pole three-state outputs designed specifically for driving highly-
capacitive or relatively low-impedance loads. The high-impedance third state and increased high-logic-level drive
provide this register with the capability of being connected directly to and driving the bus lines in a bus-organized
system without need for interface or pull-up components. They are particularly attractive for implementing buffer
registers, I/O ports, bidirectional bus drivers, and working registers. The eight flip-flops are edge-triggered D-type flip-
flops. On the positive transition the clock, the Q outputs will be set to the logic states that ware setup at the D inputs.
Features
•
Ordering Information
Part Name
HD74LS374P
HD74LS374FPEL
HD74LS374RPEL
Package Type
DILP-20 pin
SOP-20 pin (JEITA)
SOP-20 pin (JEDEC)
Package Code
(Previous Code)
PRDP0020AC-B
(DP-20NEV)
PRSP0020DD-B
(FP-20DAV)
Package
Abbreviation
P
FP
Taping Abbreviation
(Quantity)
—
EL (2,000 pcs/reel)
EL (1,000 pcs/reel)
PRSP0020DC-A
RP
(FP-20DBV)
Note: Please consult the sales office for the above package availability.
Pin Arrangement
Output
Control
1Q
1D
2D
2Q
3Q
3D
4D
4Q
GND
1
2
3
4
5
6
7
8
9
10
Q
OE
CK
D
CK
D
OE
Q
Q
OE
CK
D
CK
D
OE
Q
OE Q
CK
D
CK
D
OE
Q
OE Q
CK
D
CK
D
OE
Q
20
19
18
17
16
15
14
13
12
11
V
CC
8Q
8D
7D
7Q
6Q
6D
5D
5Q
Clock
(Top view)
Rev.2.00, Feb.18.2005, page 1 of 7