M16C/6K9 Group
Description
Block Diagram
Fig.AA-3 is a block diagram of the M16C/6K9 (144-pin version) group.
8
8
8
8
8
8
8
I/O ports
Port P0
Port P1
Port P2
Port P3
Port P4
Port P5
Port P6
Port P7
Internal peripheral function
Timer
Timer TA0(16 bits)
Timer TA1(16 bits)
Timer TA2(16 bits)
Timer TA3(16 bits)
Timer TA4(16 bits)
Timer TB0(16 bits)
Timer TB1(16 bits)
Timer TB2(16 bits)
Timer TB3(16 bits)
Timer TB4(16 bits)
Timer TB5(16 bits)
Watchdog timer
(15 bits)
DMAC
(2 channels)
D-A converter
(8 bits x 2channels)
PS2 interface
(3 channels)
Serial interrupt output
(6 factors)
A-D converter
(10 bits x 8 channels
Expandable up to 10 channels)
UART/clock synchronous SI/O
(8 bits x 3 channels)
Comparator
(8 channels)
Host interface
(LPC bus interface
x
4 channels)
System clock generator
X
IN
-X
OUT
X
CIN
-X
COUT
Clock synchronous SI/O
(8 bits x 2channels)
2
8
Port P8
7
I C bus interface
(Note 3)
PWM output
(8 bits x 6channels)
Port P8
5
Port P9
M16C/60 series 16-bit CPU core
Registers
R0H
R0
R0H
R0L
R1H
R1
L
R1H
R1L
R L
R2
R
2
R3
A
3
A0
A
0
A1
FB
1
FB
SB
Memory
ROM
(Note1)
RAM
(Note2)
8
Program counter
PC
Stack pointer
ISP
USP
Port P10
8
Vector table
INTB
Flag register
FLG
Multiplier
Port P16
Port P15
Port P14
Port P13
Port P12
Port P11
2
8
8
8
8
8
Note1 : ROM size depends on MCU type.
Note2 : RAM size depends on MCU type.
Note3 : A number of channels depends on MCU type.
Fig.AA-3 Block diagram of M16C/6K9 (144-pin version) group
Rev.1.00
Jun 06, 2003
page 6 of 290
RENESAS [ RENESAS TECHNOLOGY CORP ]
