M32C/83 Group (M32C/83, M32C/83T)
1.2 Performance Overview
Tables 1.1 and 1.2 list performance overview of the M32C/83 Group (M32C/83, M32C/83T).
Table 1.1 M32C/83 Group (M32C/83, M32C/83T) Performance (144-Pin Package)
Characteristic
Performance
M32C/83
108 instructions
M32C/83T
CPU
Basic Instructions
Minimum Instruction Execution Time 31.3 ns (f(BCLK)=32 MHz, VCC=4.2 to 5.5 V)(3) 31.3 ns (f(BCLK)=32 MHz, VCC=4.2 to 5.5 V)
50 ns (f(BCLK)=20 MHz, VCC=3.0 to 5.5 V)
(3)
Operating Mode
Single-chip mode, Memory expansion
mode and Microprocessor mode
16 Mbytes
Single-chip mode
Address Space
Memory Capacity
See Table 1.3
Peripheral I/O Port
123 I/O pins and 1 input pin
Function Multifunction Timer
Timer A: 16 bits x 5 channels, Timer B: 16 bits x 6 channels
Three-phase motor control circuit
Intelligent I/O
Time measurement function: 16 bits x 12 channels
Waveform generating function: 16 bits x 28 channels
Communication function (Clock synchronous serial I/O, Clock asynchronous se-
rial I/O, HDLC data processing, Clock synchronous variable length serial I/O,
(1)
IEBus , 8-bit or 16-bit Clock synchronous serial I/O)
Serial I/O
5 Channels
(1)
2
(2)
Clock synchronous serial I/O, Clock asynchronous serial I/O, IEBus , I C bus
1 channel Supporting CAN 2.0B specification
10-bit A/D converter: 2 circuit, 34 channels
8 bits x 2 channels
CAN Module
A/D Converter
D/A Converter
DMAC
4 channels
DMAC II
Can be activated by all peripheral function interrupt sources
Immediate transfer, Calculation transfer and Chain transfer functions
CAS before RAS refresh, Self-reflesh, EDO, EP
CRC-CCITT
DRAM
CRC Calculation Circuit
X/Y Converter
16 bits x 16 bits
Watchdog Timer
Interrupt
15 bits x 1 channel (with prescaler)
42 internal and 8 external sources, 5 software sources, Interrupt priority level: 7
4 circuits
Clock Generation Circuit
Main clock oscillation circuit(*), Sub clock oscillation circuit(*), On-chip oscillator,
PLL frequency synthesizer
(*)Equipped with a built-in feedback resistor. Ceramic resonator or crystal oscilla-
tor must be connected externally
Oscillation Stop Detect Function
Main clock oscillation stop detect function
Electrical Supply Voltage
Charact-
4.2 to 5.5 V (f(BCLK)=32 MHz)
3.0 to 5.5 V (f(BCLK)=20 MHz, through VDC)
3.0 to 3.6 V (f(BCLK)=20 MHz,
not through VDC)
4.2 to 5.5 V (f(BCLK)=32 MHz)
eristics
Power Consumption
41 mA (VCC=5 V, f(BCLK)=32 MHz)
38 mA (VCC=5 V, f(BCLK)=30 MHz)
26 mA (VCC=3.3 V, f(BCLK)=20 MHz)
470 µA (VCC=5 V, f(XCIN)=32 kHz,
in wait mode)
41 mA (VCC=5 V, f(BCLK)=32 MHz)
38 mA (VCC=5 V, Vf(BCLK)=30 MHz)
470 µA (VCC=5 V, f(XCIN)=32 kHz,
in wait mode)
0.4 µA (VCC=5 V, stop mode)
340 µA (VCC=3.3 V, f(XCIN)=32 kHz,
through VDC, in wait mode)
5.0 µA (VCC=3.3 V, f(XCIN)=32 kHz,
not through VDC, in wait mode)
0.4 µA (VCC=5 V, stop mode)
0.4 µA (VCC=3.3 V, stop mode)
3.3 ± 0.3 V or 5.0 ± 0.5 V
Flash
Program/Erase Supply Voltage
5.0 ± 0.5 V
Memory Program and Erase Endurance
Operating Ambient Temperature
Package
100 times
o
o
o
–20 to 85 C, –40 to 85 C (optional)
144-pin plastic molded LQFP
–40 to 85 C (T version)
NOTES:
1. IEBus is a trademark of NEC Electronics Corporation.
2. I2C bus is a trademark of Koninklijke Philips Electronics N. V.
3. Contact our sales office if 30-MHz or higher frequency is required.
All options are on a request basis.
Page 2
Rev. 1.41 Jan.31, 2006
REJ03B0013-0141
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