7
7.2.1 Reset at Power-on
RESET
7.2 Reset Operation
When powering on the microcomputer, hold the RESET# signal input pin low until the rated power supply volt-
age is reached and the microcomputer’s internal x8 clock generator becomes oscillating stably.
7.2.2 Reset during Operation
To reset the microcomputer during operation, hold the RESET# signal input pin low for more than 200 ns.
7.2.3 Reset at Entering RAM Backup Mode
To prevent the RAM access by the CPU or DMA from becoming interrupted by a reset, first an internal bus hold
request is output internally after accepting the reset input. Then the internal circuits are reset after the internal
bus is placed in a hold state.
Note: • Reset input at entering RAM backup mode cannot be used in the following cases (because the
internal bus hold request may not be accepted and the RAM contents may be corrupted):
• When the lock bit = 1 (see Section 2.7, “Supplementary Explanation for BSET, BCLR, LOCK
and UNLOCK Instruction Execution”)
• When executing any instruction present in external memory
7.2.4 Reset Vector Relocation during Flash Programming
When the reset signal is deasserted (released back high) after entering boot mode, the CPU starts executing the
boot program. For details, see Section 6.5, “Programming the Internal Flash Memory.”
7-3
32180 Group User’s Manual (Rev.1.0)
RENESAS [ RENESAS TECHNOLOGY CORP ]
