8
0
P0
P1
CPU operation
mode settings
P2
(Note 1)
P3
P4
(Reserved) P5
P6
P7
P8
P9
P10
P11
P12
P13
Input/output port
operation mode
setting registers P14
P15
P16
P17
P18
P19
P20
P21
P22
TO29
TIN26
TXD4
TO37
CTX0
TO30
TIN27
RXD4
TO38
CRX0
TIN16/
TIN17/
PWMOFF0 PWMOFF1
TIN8
TIN0
TO21
TIN9
TIN1
TO22
TO8
TO0
BCLK /
WR#
MOD0
(Note 3)
INPUT/OUTPUT PORTS AND PIN FUNCTIONS
8.2 Selecting Pin Functions
1
DB1
DB9
A24
A16
BLW# /
BLE#
2
DB2
DB10
A25
A17
BHW# /
BHE#
3
DB3
DB11
A26
A18
RD#
4
DB4
DB12
A27
A19
CS0#
5
DB5
DB13
A28
A20
CS1#
6
DB6
DB14
A29
A21
A13
7
DB7
DB15
A30
A22
A14
DB0
DB8
A23
A15
(P61)
WAIT#
MOD1
(Note 3)
(P62)
HREQ#
TXD0
(P63)
HACK#
RXD0
TO16
SBI#
(Note 3)
SCLKI4 / SCLKI5 /
SCLKO4 SCLKO5
(P67)
RTDTXD RTDRXD RTDACK RTDCLK
SCLKI0 /
SCLKO0
TO17
TO12
TO4
TCLK0
TXD1
TO18
TO13
TO5
TCLK1
TIN21
TIN13
TIN5
TO26
RXD2
TO34
TIN31
RXD1
TO19
TO14
TO6
TCLK2
TIN22
TIN14
TIN6
TO27
TXD3
TO35
TIN32
SCLKI1 /
SCLKO1
TO20
TO15
TO7
TCLK3
TIN23
TIN15
TIN7
TO28
RXD3
TO36
TIN33/
PWMOFF2
TO9 /
TO10 /
TXD3
(Note 2)
CTX1
(Note 2)
TO1
TO2
TO11
TO3
TIN18
TIN10
TIN2
TO23
TIN24
TO31
TIN28
TXD5
TO39
CTX1
TIN19
TIN11
TIN3
TO24
TIN25
TO32
TIN29
RXD5
TO40
CRX1
TIN20
TIN12
TIN4
TO25
TXD2
TO33
TIN30
TO41
TO42
TO43
CS2#
TO44
CS3#
A11 /
A12 /
CS2#
(Note 2)
CS3#
(Note 2)
(Note 1)
Note 1: During processor mode, these ports are switched to function as extended external signal pins. During external extension
mode, only P41-P43 are switched to function as external bus interface pins. Other pins become input/output port pins
when reset, so that some of these pins, if needed, must be set to function as external bus interface pins.
Note 2: These are triple-function pins. Their desired output function must be selected using the peripheral output select register.
Note 3: These ports cannot be used for input/output port function. The SBI#, MOD0 and MOD1 pin input levels can be read from
these ports.
Figure 8.2.1 Input/Output Ports and Pin Function Assignments
8-4
32180 Group User’s Manual (Rev.1.0)
RENESAS [ RENESAS TECHNOLOGY CORP ]
