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M37733S4LHP 参数 Datasheet PDF下载

M37733S4LHP图片预览
型号: M37733S4LHP
PDF下载: 下载PDF文件 查看货源
内容描述: 16位微机的CMOS [16-BIT CMOS MICROCOMPUTER]
分类和应用: 计算机
文件页数/大小: 37 页 / 818 K
品牌: RENESAS [ RENESAS TECHNOLOGY CORP ]
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MITSUBISHI MICROCOMPUTERS  
M37733S4LHP  
16-BIT CMOS MICROCOMPUTER  
BASIC FUNCTION BLOCKS  
The 2048-byte area allocated to addresses from 8016 to 87F16 is the  
built-in RAM. In addition to storing data, the RAM is used as stack  
during a subroutine call or interrupts.  
The M37733S4LHP has the same functions as the  
M37733MHBXXXFP except for the following :  
(1) The memory map is different.  
Peripheral devices such as I/O ports, A-D converter, serial I/O, timer,  
and interrupt control registers are allocated to addresses from 016 to  
7F16.  
(2) The processor mode is different.  
(3) The reset circuit is different.  
(4) Pulse output port mode of timer A is available.  
(5) The function of ROM area modification is not available.  
A 256-byte direct page area can be allocated anywhere in bank 016  
by using the direct page register (DPR). In the direct page addressing  
mode, the memory in the direct page area can be accessed with two  
words. Hence program steps can be reduced.  
MEMORY  
The memory map is shown in Figure 1. The address space has a  
capacity of 16 Mbytes and is allocated to addresses from 016 to  
FFFFFF16. The address space is divided by 64-Kbyte unit called bank.  
The banks are numbered from 016 to FF16.  
Built-in RAM and control registers for internal peripheral devices are  
assigned to bank 016.  
Addresses FFD616 to FFFF16 are the RESET and interrupt vector  
addresses and contain the interrupt vectors. Use ROM for memory  
of this address.  
00000016  
00007F16  
00008016  
00000016  
00000016  
Internal peripheral  
devices  
Bank 016  
Bank 116  
control registers  
refer to Fig. 2 for  
detail information  
00FFFF16  
01000016  
nternal RAM  
00007F16  
2048 bytes  
Interrupt vector table  
00FFD616  
A-D/UART2 trans./rece.  
00087F16  
UART1 transmission  
UART1 receive  
01FFFF16  
UART0 transmission  
UART0 receive  
Timer B2  
Timer B1  
Timer B0  
Timer A4  
Timer A3  
Timer A2  
FE000016  
Timer A1  
Timer A0  
Bank FE16  
Bank FF16  
INT /Key input  
2
INT1  
INT0  
FEFFFF16  
FF000016  
Watchdog timer  
DBC  
BRK instruction  
00FFD616  
00FFFF16  
Zero divide  
RESET  
00FFFE16  
FFFFFF16  
: Internal  
: External  
Fig. 1 Memory map  
5