MITSUBISHI MICROCOMPUTERS
New
p
t
duc
ro
M37735S4LHP
16-BIT CMOS MICROCOMPUTER
RTP1
0
, RTP1
1
, RTP1
2
, and RTP1
3
are applied pulse width modulation
by timer A3 by setting the pulse width modulation selection bit by
timer A3 (bit 5) of the waveform output mode register to “1”.
RTP0
0
, RTP0
1
, RTP0
2
, and RTP0
3
are applied pulse width modulation
by timer A1 by setting the pulse width modulation selection bit by
timer A1 (bit 4) of the waveform output mode register to “1”.
The contents of the pulse output data register 0 can be reversed and
output to pulse output ports RTP0
0
, RTP0
1
, RTP0
2
, and RTP0
3
by
the polarity selection bit (bit 3) of the waveform output mode register.
When the polarity selection bit is “0”, the contents of the pulse output
data register 0 is output unchangeably, and when “1”, the contents of
the pulse output data register 0 is reversed and output. When pulse
width modulation is applied, likewise the polarity reverse to pulse
width modulation can be selected by the polarity selection bit.
7 6 5 4 3 2 1 0
0 0 X 1 0 0
Address
Timer A0 mode register 56
16
Timer A2 mode register 58
16
Always “100” in pulse output
port mode
Not used in pulse output port mode
Always “00” in pulse output port mode
Clock source selection bit
0 0 : Select f
2
0 1 : Select f
16
1 0 : Select f
64
1 1 : Select f
512
7 6 5 4 3 2 1 0
0
Fig. 5 Timer A0, A2 mode register bit configuration in pulse output
port mode
Address
Weveform output mode register 62
16
Weveform output selection bit
0 0 : Parallel port
0 1 : RTP1 selected
1 0 : RTP0 selected
1 1 : RTP1 and RTP0 selected
Polarity selection bit
0 : Positive polarity
1 : Negative polarity
Pulse width modulation selection bit
by timer A1
0 : Not modulated
1 : Modulated
Pulse width modulation selection bit
by timer A3
0 : Not modulated
1 : Modulated
Always “0”
7 6 5 4 3 2 1 0
Address
Pulse output data register 0 1D
16
RTP0
0
output data
RTP0
1
output data
RTP0
2
output data
RTP0
3
output data
7 6 5 4 3 2 1 0
Address
Pulse output data register 1 1C
16
Fig. 4 Waveform output mode register bit configuration
RTP1
0
output data
RTP1
1
output data
RTP1
2
output data
RTP1
3
output data
Fig. 6 Pulse output data register bit configuration
8
RENESAS [ RENESAS TECHNOLOGY CORP ]
