M66282FP
Matters that Needs Attention when WCK Stops
n cycle
n + 1 cycle
n cycle
Disable cycle
WCK
t
WCK
t
NWES
WEB
t
DS
t
DH
t
DS
t
DH
Dn
(n)
(n)
Period for writing data (n)
into memory
Period for writing data (n)
into memory
WRESB = "H"
Input data of n cycle is read at the rising edge after WCK of n cycle and writing operation starts in the WCK low-level
period of n + l cycle. The writing operation is complete at the falling edge after n + l cycle.
To stop reading write data at n cycle, enter WCK before the rising edge after n + l cycle.
When the cycle next to n cycle is a disable cycle, WCK for a cycle requires to be entered after the disable cycle as well.
REJ03F0255-0200 Rev.2.00 Sep 14, 2007
Page 7 of 13
RENESAS [ RENESAS TECHNOLOGY CORP ]
