and CNTRL0 control pins. Setting CNTRL1 and CNTRL0 both high
place the unit in the receive mode. Setting CNTRL1 high and
CNTRL0 low place the unit in the ASK transmit mode. Setting
CNTRL1 low and CNTRL0 high place the unit in the OOK transmit
mode. Setting CNTRL1 and CNTRL0 both low place the unit in the
power-down (sleep) mode. Note that the resistor driving TXMOD
must be low in the receive and power-down modes. The PWIDTH
resistor must also be low in the power down mode to minimize cur-
rent. CNTRL1 and CNTRL0 are CMOS compatible inputs. These in-
puts must be held at a logic level; they cannot be left unconnected.
Transceiver Event Timing
Transceiver event timing is summarized in Table 1. Please refer to
this table for the following discussions.
Turn-On Timing
The maximum time t
PR
required for the receive function to become
operational at turn on is influenced by two factors. All receiver cir-
cuitry will be operational 5 ms after the supply voltage reaches
2.2 Vdc. The BBOUT-CMPIN coupling-capacitor is then DC stabi-
lized in 3 time constants (3*t
BBC
). The total turn-on time to stable re-
ceiver operation for a 10 ms power supply rise time is:
t
PR
= 15 ms + 3*t
BBC
The maximum time required for either the OOK or ASK transmitter
mode to become operational is 5 ms after the supply voltage
reaches 2.2 Vdc.
Receive-to-Transmit Timing
After turn on, the maximum time required to switch from receive to
either transmit mode is 12 µs. Most of this time is due to the start-up
of the transmitter oscillator.
Transmit-to-Receive Timing
The maximum time required to switch from the OOK or ASK trans-
mit mode to the receive mode is 3*t
BBC
, where t
BBC
is the BBOUT-
CMPIN coupling-capacitor time constant. When the operating tem-
perature is limited to 60
o
C, the time required to switch from transmit
to receive is dramatically less for short transmissions, as less
charge leaks away from the BBOUT-CMPIN coupling capacitor.
Sleep and Wake-Up Timing
The maximum transition time from the receive mode to the
power-down (sleep) mode t
RS
is 10 µs after CNTRL1 and CNTRL0
are both low (1 µs fall time).
The maximum transition time from either transmit mode to the sleep
mode (t
TOS
and t
TAS
) is 10 µs after CNTRL1 and CNTRL0 are both
low (1 µs fall time).
The maximum transition time t
SR
from the sleep mode to the receive
mode is 3*t
BBC
, where t
BBC
is the BBOUT-CMPIN coupling-capacitor
time constant. When the operating temperature is limited to 60
o
C,
the time required to switch from sleep to receive is dramatically less
for short sleep times, as less charge leaks away from the BBOUT-
CMPIN coupling capacitor.
The maximum time required to switch from the sleep mode to either
transmit mode (t
STO
and t
STA
) is 16 µs. Most of this time is due to the
start-up of the transmitter oscillator.
AGC Timing
The maximum AGC engage time t
AGC
is 5 µs after the reception of a
-30 dBm RF signal with a 1 µs envelope rise time.
The minimum AGC hold-in time is set by the value of the capacitor
at the AGCCAP pin. The hold-in time t
AGH
= C
AGC
/19.1, where t
AGH
is
in µs and C
AGC
is in pF.
Peak Detector Timing
The Peak Detector attack time constant is set by the value of the ca -
pacitor at the PKDET pin. The attack time t
PKA
= C
PKD
/4167, where
t
PKA
is in µs and C
PKD
is in pF. The Peak Detector decay time con-
stant t
PKD
= 1000*t
PKA
.
Pulse Generator Timing
In the low data rate mode, the interval t
PRI
between the falling edge
of an ON pulse to the first RF amplifier and the rising edge of the
next ON pulse to the first RF amplifier is set by a resistor R
PR
be-
tween the PRATE pin and ground. The interval can be adjusted be-
tween 0.1 and 5 µs with a resistor in the range of 51 K to 2000 K.
The value of the R
PR
is given by:
R
PR
= 404* t
PRI
+ 10.5, where t
PRI
is in µs, and R
PR
is in kilohms
In the high data rate mode (selected at the PWIDTH pin) the re-
ceiver RF amplifiers operate at a nominal 50%-50% duty cycle. In
this case, the period t
PRC
from the start of an ON pulse to the first
RF amplifier to the start of the next ON pulse to the first RF amplifier
is controlled by the PRATE resistor over a range of 0.1 to 1.1 µs us -
ing a resistor of 11 K to 220 K. In this case R
PR
is given by:
R
PR
= 198* t
PRC
- 8.51, where t
PRC
is in µs and R
PR
is in kilohms
In the low data rate mode, the PWIDTH pin sets the width of the ON
pulse to the first RF amplifier t
PW1
with a resistor R
PW
to ground (the
ON pulse width to the second RF amplifier t
PW2
is set at 1.1 times
the pulse width to the first RF amplifier in the low data rate mode).
The ON pulse width t
PW1
can be adjusted between 0.55 and 1 µs
with a resistor value in the range of 200 K to 390 K. The value of
R
PW
is given by:
R
PW
= 404* t
PW1
- 18.6, where t
PW1
is in µs and R
PW
is in kilohms
However, when the PWIDTH pin is connected to Vcc through a 1 M
resistor, the RF amplifiers operate at a nominal 50%-50% duty cy-
cle, facilitating high data rate operation. In this case, the RF amplifi-
ers are controlled by the PRATE resistor as described above.
LPF Group Delay
The low-pass filter group delay is a function of the filter 3 dB band-
width, which is set by a resistor R
LPF
to ground at the LPFADJ pin.
The minimum 3 dB bandwidth f
LPF
= 1445/R
LPF
, where f
LPF
is in kHz,
and R
LPF
is in kilohms.
The maximum group delay t
FGD
= 1750/f
LPF
= 1.21*R
LPF
, where t
FGD
is in µs, f
LPF
in kHz, and R
LPF
in kilohms.
7
RFM [ RF MONOLITHICS, INC ]
