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RT6224D 参数 Datasheet PDF下载

RT6224D图片预览
型号: RT6224D
PDF下载: 下载PDF文件 查看货源
内容描述: [暂无描述]
分类和应用:
文件页数/大小: 15 页 / 315 K
品牌: RICHTEK [ RICHTEK TECHNOLOGY CORPORATION ]
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RT6224D  
Feed-Forward Capacitor (CFF)  
Enable Operation (EN)  
The RT6224D is optimized for ceramic output capacitors  
and for low duty cycle applications. However for high-output  
voltages, with high feedback attenuation, the circuit's  
response becomes over-damped and transient response  
can be slowed. In high-output voltage circuits (VOUT > 3.3V)  
transient response is improved by adding a small feed-  
forwardcapacitor (CFF) across the upper FB divider  
resistor (Figure 1), to increase the circuit's Q and reduce  
damping to speed up the transient response without  
affecting the steady-state stability of the circuit. Choose  
a suitable capacitor value that following below step.  
For automatic start-up the EN pin can be connected to  
VIN, through a 100kΩ resistor. Its large hysteresis band  
makes EN useful for simple delay and timing circuits. EN  
can be externally pulled to VIN by adding a resistor-  
capacitor delay (REN and CEN in Figure 2). Calculate the  
delay time using EN's internal threshold where switching  
operation begins (1.5V, typical).  
An external MOSFET can be added to implement digital  
control of EN when no system voltage above 2V is available  
(Figure 3). In this case, a 100kΩ pull-up resistor, REN, is  
connected between VIN and the EN pin. The MOSFET  
Q1 will be under logic control to pull down the EN pin. To  
prevent enabling circuit when VINis smaller than the VOUT  
target value or some other desired voltage level, a resistive  
voltage divider can be placed between the input voltage  
and ground and connected to EN to create an additional  
input under voltage lockout threshold (Figure 4).  
Get the BW the quickest method to do transient  
response form no load to full load. Confirm the damping  
frequency. The damping frequency is BW.  
BW  
EN  
R
EN  
V
IN  
EN  
RT6224D  
C
EN  
V
OUT  
GND  
R1  
C
FF  
Figure 2. External Timing Control  
FB  
RT6224D  
R2  
R
100k  
EN  
GND  
V
EN  
RT6224D  
GND  
IN  
Q1  
Enable  
Figure 1. CFF Capacitor Setting  
CFF can be calculated base on below equation :  
1
CFF  
23.1412R1BW 0.8  
Figure 3. Digital Enable Control Circuit  
Internal Soft-Start (SS)  
The RT6224D soft-start uses an internal soft-start time  
R
EN1  
V
IN  
EN  
800μs.  
R
EN2  
RT6224D  
GND  
Following below equation to get the minimum capacitance  
range in order to avoid UV occur.  
COUT VOUT 0.61.2  
t   
(ILIM Load Current)0.8  
Figure 4. ResistorDivider for Lockout Threshold Setting  
t 800μs  
Copyright 2018 Richtek Technology Corporation. All rights reserved.  
©
is a registered trademark of Richtek Technology Corporation.  
www.richtek.com  
12  
DS6224D-01 August 2018