欢迎访问ic37.com |
会员登录 免费注册
发布采购

RT8010A 参数 Datasheet PDF下载

RT8010A图片预览
型号: RT8010A
PDF下载: 下载PDF文件 查看货源
内容描述: 为1.5MHz , 1A ,高效率PWM降压型DC / DC转换器 [1.5MHz, 1A, High Efficiency PWM Step-Down DC/DC Converter]
分类和应用: 转换器
文件页数/大小: 15 页 / 398 K
品牌: RICHTEK [ RICHTEK TECHNOLOGY CORPORATION ]
 浏览型号RT8010A的Datasheet PDF文件第7页浏览型号RT8010A的Datasheet PDF文件第8页浏览型号RT8010A的Datasheet PDF文件第9页浏览型号RT8010A的Datasheet PDF文件第10页浏览型号RT8010A的Datasheet PDF文件第12页浏览型号RT8010A的Datasheet PDF文件第13页浏览型号RT8010A的Datasheet PDF文件第14页浏览型号RT8010A的Datasheet PDF文件第15页  
RT8010/A
The output ripple is highest at maximum input voltage
since
ΔI
L
increases with input voltage. Multiple capacitors
placed in parallel may be needed to meet the ESR and
RMS current handling requirements. Dry tantalum, special
polymer, aluminum electrolytic and ceramic capacitors are
all available in surface mount packages. Special polymer
capacitors offer very low ESR but have lower capacitance
density than other types. Tantalum capacitors have the
highest capacitance density but it is important to only
use types that have been surge tested for use in switching
power supplies. Aluminum electrolytic capacitors have
significantly higher ESR but can be used in cost-sensitive
applications provided that consideration is given to ripple
current ratings and long term reliability. Ceramic capacitors
have excellent low ESR characteristics but can have a
high voltage coefficient and audible piezoelectric effects.
The high Q of ceramic capacitors with trace inductance
can also lead to significant ringing.
Using Ceramic Input and Output Capacitors
Higher values, lower cost ceramic capacitors are now
becoming available in smaller case sizes. Their high ripple
current, high voltage rating and low ESR make them ideal
for switching regulator applications. However, care must
be taken when these capacitors are used at the input and
output. When a ceramic capacitor is used at the input
and the power is supplied by a wall adapter through long
wires, a load step at the output can induce ringing at the
input, V
IN
. At best, this ringing can couple to the output
and be mistaken as loop instability. At worst, a sudden
inrush of current through the long wires can potentially
cause a voltage spike at V
IN
large enough to damage the
part.
Output Voltage Programming
The resistive divider allows the FB pin to sense a fraction
of the output voltage as shown in Figure 4.
V
OUT
R1
FB
RT8010/A
GND
R2
For adjustable voltage mode, the output voltage is set by
an external resistive divider according to the following
equation :
V
OUT
=
V
REF
(1
+
R1)
R2
where V
REF
is the internal reference voltage (0.6V typ.)
Efficiency Considerations
The efficiency of a switching regulator is equal to the output
power divided by the input power times 100%. It is often
useful to analyze individual losses to determine what is
limiting the efficiency and which change would produce
the most improvement. Efficiency can be expressed as :
Efficiency = 100%
(L1+ L2+ L3+ ...)
where L1, L2, etc. are the individual losses as a percentage
of input power. Although all dissipative elements in the
circuit produce losses, two main sources usually account
for most of the losses : VIN quiescent current and I
2
R
losses.
The VIN quiescent current loss dominates the efficiency
loss at very low load currents whereas the I
2
R loss
dominates the efficiency loss at medium to high load
currents. In a typical efficiency plot, the efficiency curve
at very low load currents can be misleading since the
actual power lost is of no consequence.
1. The VIN quiescent current appears due to two factors
including : the DC bias current as given in the electrical
characteristics and the internal main switch and
synchronous switch gate charge currents. The gate charge
current results from switching the gate capacitance of the
internal power MOSFET switches. Each time the gate is
switched from high to low to high again, a packet of charge
ΔQ
moves from V
IN
to ground.
The resulting
ΔQ/Δt
is the current out of V
IN
that is typically
larger than the DC bias current. In continuous mode,
I
GATECHG
= f(Q
T
+Q
B
)
where Q
T
and Q
B
are the gate charges of the internal top
and bottom switches. Both the DC bias and gate charge
losses are proportional to V
IN
and thus their effects will
be more pronounced at higher supply voltages.
Figure 4. Setting the Output Voltage
DS8010/A-02 March 2007
www.richtek.com
11