RT8101/A
2) Output Capacitor
Preliminary
3) Input Capacitor
The selection of input capacitor is mainly based on its
maximum ripple current capability. The buck converter
draws pulsewise current from the input capacitor during
the on time of S1 as shown in Figure 8. The RMS
value of
ripple current flowing through the input capacitor is
described as :
Irms
=
I
OUT
D(1 - D) (A)
I
OUT
T
S
The selection of output capacitor depends on the output
ripple voltage requirement. Practically, the output ripple
voltage is a function of both capacitance value and the
equivalent series resistance (ESR) r
C
. Figure 9 shows
the related waveforms of output capacitor.
I
L
dI
L
V
IN
-V
OUT
=
L
dt
V
OUT
dI
L
=
dt
L
(6)
The input capacitor
must be capable of handling this ripple
current. Sometimes, for higher
efficiency the low ESR
capacitor is necessarily.
I
C
1/2
ΔI
L
0
ΔI
L
Thermal Considerations
For continuous operation, do not exceed absolute
maximum operation junction temperature 125°C. The
maximum power dissipation depends on the thermal
resistance of IC package, PCB layout, the rate of
V
OC
ΔV
OC
V
OR
ΔI
L
x r
C
0
surroundings airflow and temperature difference between
junction to ambient. The maximum power dissipation can
be calculated by following formula :
P
D(MAX)
= ( T
J(MAX)
−
T
A
) /
θ
JA
Where T
J(MAX)
is the maximum operation junction
temperature 125°C, T
A
is the ambient temperature and the
θ
JA
is the junction to ambient thermal resistance.
For recommended operating conditions specification of
RT8101/A, where T
J(MAX)
is the maximum junction
temperature of the die (125°C) and T
A
is the maximum
ambient temperature. The junction to ambient thermal
resistance
θ
JA
is layout dependent.
The maximum power dissipation at T
A
= 25°C can be
calculated by following formula :
P
D(MAX)
= ( 125°C
−
25°C) / (120°C/W) = 0.83W for
SOP-8 packages
P
D(MAX)
= ( 125°C
−
25°C) / (75°C/W) = 1.33W for
PSOP-8 packages
The maximum power dissipation depends on operating
ambient temperature for fixed T
J (MAX)
and thermal
resistance
θ
JA
. For RT8101/A packages, Figure 10 allows
the designer to see the effect of rising ambient temperature
on the maximum power allowed.
t1
t2
Figure 9. The related waveforms of output capacitor
The AC impedance of output capacitor at operating
frequency is quite smaller than the load impedance, so
the ripple current (ΔI
L
) of the inductor current flows mainly
through output capacitor. The output ripple voltage is
described as :
Δ
V
OUT
= Δ
V
OR
+ Δ
V
OC
Δ
V
OUT
= Δ
I
L
×
r
C
+
1
C
O
(2)
t2
∫
t1
I
C
dt
(3)
(4)
Δ
V
OUT
= Δ
I
L
× Δ
I
L
×
r
C
+
2
1 V
OUT
(1
−
D)T
S
8 C
OL
where
ΔV
OR
is caused by ESR and
ΔV
OC
by capacitance.
For electrolytic capacitor application, typically 90 to 95%
of the output voltage ripple is contributed by the ESR of
output capacitor. So Equation (4) could be simplified as :
Δ
V
OUT
=
Δ
I
L
x r
C
(5)
Users could connect capacitors in parallel to get calculated
ESR.
www.richtek.com
12
DS8101/A-01 March 2007
RICHTEK [ RICHTEK TECHNOLOGY CORPORATION ]
